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紧急求助AM5728的I2S音频问题,马上量产!

lei huang2
Prodigy 246 points
Other Parts Discussed in Thread: AM5728

AM5728的McASP7的发送I2S音频数据时，McASP7作为master,时钟AHCLKX的MCLK=12.288MHz是由外面输入到AM5728。
然后McASP7的LRCLK可否设定输出来192KHz？

如何设置寄存器,使McASP7的SCLK输出来12.288MHz?

  • 0
    Prodigy 11 points

    The same question as Lei huang2.

    How to setting: Multichannel Audio Serial Port 7  as Audio I2S output master mode?

    1, So far mcasp7 [mcasp7_ahclkx] setting asI2S MCLK = 20MHz, but  can not setting as 12.288MHz or 24,576MHz.

    It is AM5728 chip internal colock bus limitation, right?

    If it can not do this, we can add a Crystal on board.

    2, If MCLK can not generate base on I2S standard format, how can setting [mcasp7_aclkx] and [mcasp7_fsx] as BCK and LRCLK as below clock.

    They need meet as I2S standard as  [mcasp7_aclkx]  as BCK = 12.288MHz/64Fs or 6.144MHz/128Fs or 3.072MHz/256Fs.

    And [mcasp7_fsx] as LRCLK = 192KHz or 96KHz or 48KHz.

    Those are standard I2S format for audio master output.

    We will driver standalone DAC, chip AD1955.

  • 0 回复 Sheldon Wang
    Prodigy 246 points

    May you confirm this critical information:

    1, So far mcasp7 [mcasp7_ahclkx] setting asI2S MCLK = 20MHz, but  can not setting as 12.288MHz or 24,576MHz.

  • 0 回复 Sheldon Wang
    Prodigy 246 points

    1 mcasp7 [mcasp7_ahclkx]   can not setting as 12.288MHz or 24,576MHz, am I right? where  or which document can I find the information about this restriction?