Three external SDRAM question

chenyu zhang2 说：

Question 1

Now I am using your evm5515 borad for USB audio project, I notice one thing that your SDRAM base address is started from as below:

// SDRAM base address- should match value in bios tcf file

#define SDRAM_BASE_ADDR         ( 0x28000 )  /* 16-bit word base address */

#define SDRAM_LEN               ( 0x3D8000 ) /* length in 16-bit words */

So I am wondering why? From your doc, it should be started from 0x50000 at least:

 So I want to know why?

16bit Word address 0x28000 is 8bit byte address 0x50000, So same thing.

chenyu zhang2 说：

Question 2

And from your example code, I notice that you only support access SDRAM from base address, but I have one question like this: http://e2e.ti.com/support/dsp/c5000/f/109/t/200775

 Do you have such solution please?

What do you want specifically? boot to SDRAM without secondary bootloader? it can be done by initialize SDRAM in boot table. you can refer C5515 bootloader application notes section 3.3.1.2 to convert .out to bin/hex file, add register configuration to boot table by -reg_config command in convert command file to initialize SDRAM before move code by ROM bootloader.

-boot ;option to create a boot table
-v5505 ;use C55x boot table format for TMS320C5515/14
-serial8 ;boot mode is 8-bit standard serial boot
-reg_config 0x1c8c, 0x0001 ;write 0x0001 to peripheral register at address 0x1C8C
-delay 0x100 ;delay for 256 CPU clock cycles
-I ;desired output format is Intel format
-o my_app.io ;specify the output filename
my_app.out ;specify the input file

chenyu zhang2 说：

Question 3:

Could I link external SDRAM in cmd file? What I want to say is like the website:

http://e2e.ti.com/support/microcontrollers/c2000/f/171/t/206256

 But it is said that not working since “this will not work since EPI realted configuration are not done yet. ”

 Is it true? If so, I only have to use SDRAM like your example code, correct?

If I understand correct, you want to run code on SDRAM, if yes, Sure you can do that. you can refer C5515 EVM test file, download test file(target content) from this link: http://support.spectrumdigital.com/boards/evm5515/revb/

just change cmd file to assign code/data to SDRAM memory.

hi Tony：

非常感谢你的快速和专业的回答，那其实我的第二个问题和第三个问题现在来看是可以融合为一个问题了是吧？那我总结一下：

1，首先我需要在reg_config中把SDRAM配置上

2，然后在我的程序中把code/data放到SDRAM中

是这样吗？如果是的，请问你们再5515evm上有例程没有？我希望直接参考一下，这样可以更有把握。

Thanks.

是这样的。

有用户这样实现。

你指的例程是cmd文件还是转换时加reg_config的例子？

cmd文件随便改一下就行。转换的例子没有。

MEMORY
{
MMR (RW) : origin = 0000000h length = 0000c0h /* MMRs */
/*DARAM_0 (RW) : origin = 00000C0h length = 001A00h /* on-chip DARAM 0 */
/* DARAM_1 (RW) : origin = 0002000h length = 002000h /* on-chip DARAM 1 */
/* DARAM_2 (RW) : origin = 0004000h length = 002000h /* on-chip DARAM 2 */
/* DARAM_3 (RW) : origin = 0006000h length = 00A000h /* on-chip DARAM 3 */
/* DARAM_3 (RW) : origin = 0006000h length = 002000h /* on-chip DARAM 3 */
/* DARAM_4 (RW) : origin = 0008000h length = 002000h /* on-chip DARAM 4 */
/* DARAM_5 (RW) : origin = 000A000h length = 002000h /* on-chip DARAM 5 */
/* DARAM_6 (RW) : origin = 000C000h length = 002000h /* on-chip DARAM 6 */
/* DARAM_7 (RW) : origin = 000e000h length = 002000h /* on-chip DARAM 7 */

DARAM (RW) : origin = 00000c0h length = 00ff40h /* on-chip DARAM */

/* SARAM_0 (RW) : origin = 0010000h length = 002000h /* on-chip SARAM 0 */
/* SARAM_1 (RW) : origin = 0012000h length = 002000h /* on-chip SARAM 1 */
/* SARAM_2 (RW) : origin = 0014000h length = 002000h /* on-chip SARAM 2 */
/* SARAM_3 (RW) : origin = 0016000h length = 002000h /* on-chip SARAM 3 */

/* SARAM_4 (RW) : origin = 0018000h length = 002000h /* on-chip SARAM 4 */
/* SARAM_5 (RW) : origin = 001A000h length = 002000h /* on-chip SARAM 5 */
/* SARAM_6 (RW) : origin = 001C000h length = 002000h /* on-chip SARAM 6 */
/* SARAM_7 (RW) : origin = 001e000h length = 002000h /* on-chip SARAM 7 */

/* SARAM_8 (RW) : origin = 0020000h length = 002000h /* on-chip SARAM 8 */
/* SARAM_9 (RW) : origin = 0022000h length = 002000h /* on-chip SARAM 9 */
/* SARAM_10 (RW) : origin = 0024000h length = 002000h /* on-chip SARAM 10 */
/* SARAM_11 (RW) : origin = 0026000h length = 002000h /* on-chip SARAM 11 */

/* SARAM_12 (RW) : origin = 0028000h length = 002000h /* on-chip SARAM 12 */
/* SARAM_13 (RW) : origin = 002A000h length = 002000h /* on-chip SARAM 13 */
/* SARAM_14 (RW) : origin = 002C000h length = 002000h /* on-chip SARAM 14 */
/* SARAM_15 (RW) : origin = 002e000h length = 002000h /* on-chip SARAM 15 */

/* SARAM_16 (RW) : origin = 0030000h length = 002000h /* on-chip SARAM 16 */
/* SARAM_17 (RW) : origin = 0032000h length = 002000h /* on-chip SARAM 17 */
/* SARAM_18 (RW) : origin = 0034000h length = 002000h /* on-chip SARAM 18 */
/* SARAM_19 (RW) : origin = 0036000h length = 002000h /* on-chip SARAM 19 */

/* SARAM_20 (RW) : origin = 0038000h length = 002000h /* on-chip SARAM 20 */
/* SARAM_21 (RW) : origin = 003A000h length = 002000h /* on-chip SARAM 21 */
/* SARAM_22 (RW) : origin = 003C000h length = 002000h /* on-chip SARAM 22 */
/* SARAM_23 (RW) : origin = 003e000h length = 002000h /* on-chip SARAM 23 */

/* SARAM_24 (RW) : origin = 0040000h length = 002000h /* on-chip SARAM 24 */
/* SARAM_25 (RW) : origin = 0042000h length = 002000h /* on-chip SARAM 25 */
/* SARAM_26 (RW) : origin = 0044000h length = 002000h /* on-chip SARAM 26 */
/* SARAM_27 (RW) : origin = 0046000h length = 002000h /* on-chip SARAM 27 */

/* SARAM_28 (RW) : origin = 0048000h length = 002000h /* on-chip SARAM 28 */
/* SARAM_29 (RW) : origin = 004A000h length = 002000h /* on-chip SARAM 29 */
/* SARAM_30 (RW) : origin = 004C000h length = 002000h /* on-chip SARAM 30 */
/* SARAM_31 (RW) : origin = 004E000h length = 002000h /* on-chip SARAM 31 */

SARAM (RW) : origin = 0030000h length = 01e000h /* on-chip SARAM */

SAROM_0 (RX) : origin = 0fe0000h length = 008000h /* on-chip ROM 0 */
SAROM_1 (RX) : origin = 0fe8000h length = 008000h /* on-chip ROM 1 */
SAROM_2 (RX) : origin = 0ff0000h length = 008000h /* on-chip ROM 2 */
SAROM_3 (RX) : origin = 0ff8000h length = 008000h /* on-chip ROM 3 */

EMIF_CS0 (RW) : origin = 0050000h length = 07B0000h /* mSDR */
EMIF_CS2 (RW) : origin = 0800000h length = 0400000h /* ASYNC1 : NAND */
EMIF_CS3 (RW) : origin = 0C00000h length = 0200000h /* ASYNC2 : NAND */
EMIF_CS4 (RW) : origin = 0E00000h length = 0100000h /* ASYNC3 : NOR */
EMIF_CS5 (RW) : origin = 0F00000h length = 00E0000h /* ASYNC4 : SRAM */
/* EMIF_CS5 (RW) : origin = 0F00000h length = 0100000h*/ /* ASYNC4 : SRAM */

}

SECTIONS
{
vectors (NOLOAD)
.bss : > DARAM /*, fill = 0 */
vector : > DARAM ALIGN = 256
.stack : > DARAM
.sysstack : > DARAM
.sysmem : > DARAM
/* .sysmem : > EMIF_CS5 */
.text : > SARAM
/* .text : > EMIF_CS5 */
.data : > DARAM
.cinit : > DARAM
.const : > DARAM
.cio : > DARAM
.usect : > DARAM
.switch : > DARAM
.emif_cs0 : > EMIF_CS0
.emif_cs2 : > EMIF_CS2
.emif_cs3 : > EMIF_CS3
.emif_cs4 : > EMIF_CS4
.emif_cs5 : > EMIF_CS5