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准备用C6678，需要从FPGA通过srio传数据，另外还需要用到DDR3，请问 供这几个的晶振可以直接接100M，66.667M，125M 的差分晶振输入吗？其他不用的时钟输入接地。
参考时钟的选择及设计，请参考keystone hardware design guide clock章节，及EVM6678的原理图。
