之前烧写程序的时候，选用软件仿真，控制台没反应，后面添加堆栈后核0 开始运行，但是速度很慢，有一些警告也没在意，后来修改了核0的一些内存映射，把核0中的一些从CORE0_L2_SRAM映射CORE0_DDR3中,也有同样的警告，也没注意，而且速度完全没变化。后来在硬件仿真的时候，程序生成了“.out”文件，但是不能运行，是警告的原因吗，警告怎么解决，警告如下！！！
还有就是怎么解决速度问题呢，把映射到CORE0_L2_SRAM的内容全部映射CORE0_DDR3吗？？像我下面那样可以吗？我看完全和修改前相比没什么变化？？
**** Clean-only build of configuration Debug for project new-soft ****
C:\ti\ccsv5\utils\bin\gmake -k clean
DEL /F "new-soft.out"
DEL /F "main.pp"
DEL /F "main.obj"
'Finished clean'
' '
**** Build Finished ****
**** Build of configuration Debug for project new-soft ****
C:\ti\ccsv5\utils\bin\gmake -k all
'Building file: ../main.cpp'
'Invoking: C6000 Compiler'
"C:/ti/ccsv5/tools/compiler/c6000_7.3.4/bin/cl6x" -mv6600 -g -O3 -ms3 --include_path="C:/ti/ccsv5/tools/compiler/c6000_7.3.4/include" --display_error_number --diag_warning=225 --abi=coffabi --preproc_with_compile --preproc_dependency="main.pp" "../main.cpp"
'Finished building: ../main.cpp'
' '
'Building target: new-soft.out'
'Invoking: C6000 Linker'
"C:/ti/ccsv5/tools/compiler/c6000_7.3.4/bin/cl6x" -mv6600 -g -O3 -ms3 --display_error_number --diag_warning=225 --abi=coffabi -z -m"new-soft.map" --warn_sections --display_error_number -i"C:/ti/ccsv5/tools/compiler/c6000_7.3.4/lib" -i"C:/ti/ccsv5/tools/compiler/c6000_7.3.4/include" --reread_libs --rom_model -o "new-soft.out" "./main.obj" -l"libc.a" "../C6678.cmd"
<Linking>
warning #10247-D: creating output section ".cinit" without a SECTIONS
specification
warning #10247-D: creating output section ".cio" without a SECTIONS
specification
warning #10247-D: creating output section ".const" without a SECTIONS
specification
warning #10247-D: creating output section ".far" without a SECTIONS
specification
warning #10247-D: creating output section ".pinit" without a SECTIONS
specification
warning #10247-D: creating output section ".stack" without a SECTIONS
specification
warning #10247-D: creating output section ".sysmem" without a SECTIONS
specification
warning #10247-D: creating output section ".text" without a SECTIONS
specification
'Finished building target: new-soft.out'
' '
**** Build Finished ****
-c
-heap 0x10000000
-stack 0x10000
MEMORY
{
SHRAM: o = 0x0C000000 l = 0x00400000 /* 4MB Multicore shared Memmory */
CORE0_L2_SRAM: o = 0x10800000 l = 0x00080000 /* 512kB CORE0 L2/SRAM */
CORE0_L1P_SRAM: o = 0x10E00000 l = 0x00008000 /* 32kB CORE0 L1P/SRAM */
CORE0_L1D_SRAM: o = 0x10F00000 l = 0x00008000 /* 32kB CORE0 L1D/SRAM */
CORE1_L2_SRAM: o = 0x11800000 l = 0x00080000 /* 512kB CORE1 L2/SRAM */
CORE1_L1P_SRAM: o = 0x11E00000 l = 0x00008000 /* 32kB CORE1 L1P/SRAM */
CORE1_L1D_SRAM: o = 0x11F00000 l = 0x00008000 /* 32kB CORE1 L1D/SRAM */
CORE2_L2_SRAM: o = 0x12800000 l = 0x00080000 /* 512kB CORE2 L2/SRAM */
CORE2_L1P_SRAM: o = 0x12E00000 l = 0x00008000 /* 32kB CORE2 L1P/SRAM */
CORE2_L1D_SRAM: o = 0x12F00000 l = 0x00008000 /* 32kB CORE2 L1D/SRAM */
CORE3_L2_SRAM: o = 0x13800000 l = 0x00080000 /* 512kB CORE3 L2/SRAM */
CORE3_L1P_SRAM: o = 0x13E00000 l = 0x00008000 /* 32kB CORE3 L1P/SRAM */
CORE3_L1D_SRAM: o = 0x13F00000 l = 0x00008000 /* 32kB CORE3 L1D/SRAM */
CORE4_L2_SRAM: o = 0x14800000 l = 0x00080000 /* 512kB CORE4 L2/SRAM */
CORE4_L1P_SRAM: o = 0x14E00000 l = 0x00008000 /* 32kB CORE4 L1P/SRAM */
CORE4_L1D_SRAM: o = 0x14F00000 l = 0x00008000 /* 32kB CORE4 L1D/SRAM */
CORE5_L2_SRAM: o = 0x15800000 l = 0x00080000 /* 512kB CORE5 L2/SRAM */
CORE5_L1P_SRAM: o = 0x15E00000 l = 0x00008000 /* 32kB CORE5 L1P/SRAM */
CORE5_L1D_SRAM: o = 0x15F00000 l = 0x00008000 /* 32kB CORE5 L1D/SRAM */
CORE6_L2_SRAM: o = 0x16800000 l = 0x00080000 /* 512kB CORE6 L2/SRAM */
CORE6_L1P_SRAM: o = 0x16E00000 l = 0x00008000 /* 32kB CORE6 L1P/SRAM */
CORE6_L1D_SRAM: o = 0x16F00000 l = 0x00008000 /* 32kB CORE6 L1D/SRAM */
CORE7_L2_SRAM: o = 0x17800000 l = 0x00080000 /* 512kB CORE7 L2/SRAM */
CORE7_L1P_SRAM: o = 0x17E00000 l = 0x00008000 /* 32kB CORE7 L1P/SRAM */
CORE7_L1D_SRAM: o = 0x17F00000 l = 0x00008000 /* 32kB CORE7 L1D/SRAM */
EMIF16_CS2: o = 0x70000000 l = 0x04000000 /* 64MB EMIF16 CS2 Data Memory */
EMIF16_CS3: o = 0x74000000 l = 0x04000000 /* 64MB EMIF16 CS3 Data Memory */
EMIF16_CS4: o = 0x78000000 l = 0x04000000 /* 64MB EMIF16 CS4 Data Memory */
EMIF16_CS5: o = 0x7C000000 l = 0x04000000 /* 64MB EMIF16 CS5 Data Memory */
CORE0_DDR3: o = 0x80000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE0 */
CORE1_DDR3: o = 0x90000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE1 */
CORE2_DDR3: o = 0xA0000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE2 */
CORE3_DDR3: o = 0xB0000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE3 */
CORE4_DDR3: o = 0xC0000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE4 */
CORE5_DDR3: o = 0xD0000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE5 */
CORE6_DDR3: o = 0xE0000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE6 */
CORE7_DDR3: o = 0xF0000000 l = 0x10000000 /* 256MB DDR3 SDRAM for CORE7 */
}
SECTIONS
{
#ifdef CORE0
.text > CORE0_L2_SRAM
.stack > CORE0_DDR3 //CORE0_L2_SRAM
.bss > CORE0_DDR3 //CORE0_L2_SRAM
.cio > CORE0_DDR3 //CORE0_L2_SRAM
.const > CORE0_L2_SRAM
.data > CORE0_L2_SRAM
.switch > CORE0_L2_SRAM
.sysmem > CORE0_DDR3 //CORE0_L2_SRAM
.far > CORE0_L2_SRAM
.args > CORE0_DDR3 //CORE0_L2_SRAM
.ppinfo > CORE0_DDR3 //CORE0_L2_SRAM
.ppdata > CORE0_DDR3 //CORE0_L2_SRAM
/* COFF sections */
.pinit > CORE0_DDR3 //CORE0_L2_SRAM
.cinit > CORE0_DDR3 //CORE0_L2_SRAM
/* EABI sections */
.binit > CORE0_DDR3 //CORE0_L2_SRAM
.init_array > CORE0_DDR3 //CORE0_L2_SRAM
.neardata > CORE0_DDR3 //CORE0_L2_SRAM
.fardata > CORE0_DDR3 //CORE0_L2_SRAM
.rodata > CORE0_DDR3 //CORE0_L2_SRAM
.c6xabi.exidx > CORE0_DDR3 //CORE0_L2_SRAM
.c6xabi.extab > CORE0_DDR3 //CORE0_L2_SRAM
#endif
