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编译自己写的DSP库时报overflowed错误



自己编写dsp关于FFT计算的库时,计算点数是32K点,使用8k时没有错误;使用32K时提示一下警告

"VLIB_convertUYVYint_to_LABpl_i.c", line 17 (approximate): warning: relocation
from function "VLIB_convertUYVYint_to_LABpl" to symbol "__fixdi" overflowed;
the 22-bit relocated address 0xe0f578 is too large to encode in the 21-bit
signed PC-Relative field (type = 'R_C60PCR21' (82), file =
"../../libs/vlib.l64p<VLIB_convertUYVYint_to_LABpl_i.obj>", offset =
0x00001cf0, section = ".text")

warning: relocation to symbol "_DSP_fir_r4" overflowed; the 22-bit relocated
address 0xe15360 is too large to encode in the 21-bit signed PC-Relative
field (type = 'R_C60PCR21' (82), file =
"/home/coinv/ti-dvsdk_omapl138-evm_04_03_00_06/c6accel_1_01_00_07/soc/packag
es/ti/c6accel/lib/C6Accel.l674<c6accel_c674_release.o674>", offset =
0x00000000, section = ".tramp._DSP_fir_r4.1")

请问这是以上错误哪些原因造成的