This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

CLA中断和TIMER0中断问题

Other Parts Discussed in Thread: TMS320F28377S, TMS320F28377D

本人在TI例程cla_adc_fir32_cpu01中添加TIMER0中断,增加中断处理的内容,在各个中断进入时拉高相应的管脚电平,在各自处理完内容后又都拉低相应的管脚电平,在测试中发现两个中断相互产生了影响,并不是像手册所说的CLA协处理器的独立性,不知道哪里出了问题,请高手指教.