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AM3352 GPMC 操作SRAM时序问题

Other Parts Discussed in Thread: AM3352

大家好,我想在用AM3352的GPMC连接一片16bit的SRAM,在TRM中根据下面的额时序Read,配置GPMC_CONFIG1_i~GPMC_CONFIG7_i,这里时序的基准是GPMC_FCLK,你如果GPMC_FCLK定了时序也就定死了?不同的存储器件的时序怎么设定呢?也就是下图的这个时序如何跟实际的SRAM时序相对应呢?

下图READCYCLETIME用了19个GPMC_FCLK,在设置 GPMC_CONFIG5_i的4-0:10011 即19GPMC_FCLK ,如果实际SRAM手册要求 ReadCycleTime为10ns,

那这两个时间是 如何对应起来的呢?(这里GPMC_FCLK=100M)