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C6657 引脚电路问题



TI的工程师:

             请问我看C6657EVM板上,引脚F22,D23定义为VCL,VD,接上拉电阻到1.8v,  但是C6657 Datasheet上F22,D23是RSV20,RSV21引脚要求悬空,

请问这2个PIN脚到底如何处理,

  • 以数据手册为准,这两个管脚是预留的。

    The DSP_VC and DSP_VD pins were reserved for a PMBus like implementation of the smart reflex interface.  That interface is not supported on this part, you can leave them unconnected.