6678多核编程问题

大家好，

我在6678L上采用shared region方法进行多核编程，目前测试一个早core0和core1上运行的两核的小例子，出现了问题。我在MSMCSRAM里放置一个待操作的向量u，并在MSMCSRAM里放置三个变量flag，flag0和flag1，用来管理同步。flag，flag0和flag1初始值为NOP。开始时，通过把flag设为START，使得core0和core1开始分别读取并操作向量u的前一半和后一半数据，操作完成后把更改后的数据写回u，并分别把flag0和flag1置为FINISHED，更改后的flag0和flag1写回内存。在core0上轮循地检测flag0和flag1的值，直到二者均为FINISHED，打印u的值。

我的问题是，在core0上轮循检测flag0和flag1的值时，flag1始终为NOP，然而在core1上flag1已经被置为FINISHED且写回内存了。请教问题是出在哪里？非常感谢！

我的程序如下：

CORE 0:

#include <stdio.h>
#include <c6x.h>
#include "ti\csl\csl_cache.h"
#include "ti\csl\csl_cacheAux.h"

typedef enum{
 NOP,
 START,
 FINISHED
}FLAG;

#pragma DATA_SECTION(flag,".flags");
#pragma DATA_ALIGN(flag, CACHE_L1D_LINESIZE);
#pragma DATA_SECTION(flag0,".flags0");
#pragma DATA_ALIGN(flag0, CACHE_L1D_LINESIZE);
#pragma DATA_SECTION(flag1,".flags1");
#pragma DATA_ALIGN(flag1, CACHE_L1D_LINESIZE);
#pragma DATA_SECTION(u,".variables");
#pragma DATA_ALIGN(u, CACHE_L1D_LINESIZE);

volatile FLAG flag = NOP;
volatile FLAG flag0 = NOP;
volatile FLAG flag1 = NOP;
volatile float u[10]={1,2,3,4,5,6,7,8,9,10};

void main(void) {
 int i;
 CACHE_setL1PSize(CACHE_L1_32KCACHE);
 CACHE_setL1DSize(CACHE_L1_32KCACHE);
 CACHE_setL2Size(CACHE_0KCACHE);

 flag=START;
 CACHE_wbL1d((void*)&flag, CACHE_L1D_LINESIZE, CACHE_WAIT);
 CACHE_invL1d((void*)&u, CACHE_L1D_LINESIZE, CACHE_WAIT);
 for(i=0;i<5;i++)
 {
  u[i]=i*2+2.5+u[i];
 }
 CACHE_wbL1d((void*)&u, CACHE_L1D_LINESIZE, CACHE_WAIT);
 flag0=FINISHED;
 CACHE_wbL1d((void*)&flag0, CACHE_L1D_LINESIZE, CACHE_WAIT);
 while((flag0!=FINISHED) || (flag1!=FINISHED))
 {
  CACHE_invL1d((void*)&flag0, CACHE_L1D_LINESIZE, CACHE_WAIT);
  CACHE_invL1d((void*)&flag1, CACHE_L1D_LINESIZE, CACHE_WAIT);
 }
 CACHE_invL1d((void*)&u, CACHE_L1D_LINESIZE, CACHE_WAIT);
 for(i=0;i<10;i++)
 {
  printf("u[%d]=%f\n",i,u[i]);
 }
 flag=FINISHED;
 CACHE_wbL1d((void*)&flag, CACHE_L1D_LINESIZE, CACHE_WAIT);
}

CORE 1:

#include <stdio.h>
#include <c6x.h>
#include "ti\csl\csl_cache.h"
#include "ti\csl\csl_cacheAux.h"

typedef enum{
 NOP,
 START,
 FINISHED
}FLAG;

#pragma DATA_SECTION(flag,".flags");
#pragma DATA_ALIGN(flag, CACHE_L1D_LINESIZE);
#pragma DATA_SECTION(flag0,".flags0");
#pragma DATA_ALIGN(flag0, CACHE_L1D_LINESIZE);
#pragma DATA_SECTION(flag1,".flags1");
#pragma DATA_ALIGN(flag1, CACHE_L1D_LINESIZE);
#pragma DATA_SECTION(u,".variables");
#pragma DATA_ALIGN(u, CACHE_L1D_LINESIZE);

volatile FLAG flag = NOP;
volatile FLAG flag0 = NOP;
volatile FLAG flag1 = NOP;
volatile float u[10]={1,2,3,4,5,6,7,8,9,10};

void main(void) {
 int i;
 CACHE_setL1PSize(CACHE_L1_32KCACHE);
 CACHE_setL1DSize(CACHE_L1_32KCACHE);
 CACHE_setL2Size(CACHE_0KCACHE);

    while(flag != START)
  CACHE_invL1d((void*)&flag, CACHE_L1D_LINESIZE, CACHE_WAIT);
 CACHE_invL1d((void*)&u, CACHE_L1D_LINESIZE, CACHE_WAIT);
 for(i=5;i<10;i++)
 {
  u[i]=i*2+2.5+u[i];
 }
 CACHE_wbL1d((void*)&u, CACHE_L1D_LINESIZE, CACHE_WAIT);
 flag1=FINISHED;
 CACHE_wbL1d((void*)&flag1, CACHE_L1D_LINESIZE, CACHE_WAIT);
}

The Linker file of both core 0 and core 1:

-stack 0x0400
-heap  0x2000

MEMORY
{
  L2SRAM      : o = 0x00800000, l = 0x00080000
  MSMCSRAM       : o = 0x0c000000, l = 0x00400000
}

SECTIONS
{
  .cinit  : > L2SRAM
  .cio   : > L2SRAM
  .const  : > L2SRAM
  .data         : > L2SRAM
  .far   : > L2SRAM
  .fardata  : > L2SRAM
  .stack  : > L2SRAM
  .sysmem  : > L2SRAM
  .text         : > L2SRAM
  .neardata  : > L2SRAM
  .bss   : > L2SRAM

  .flags  : > MSMCSRAM
  .flags0  : > MSMCSRAM
  .flags1  : > MSMCSRAM
  .variables    : > MSMCSRAM
}