你好
我们现在 用AM3354 + processor SDK 03.02.00.05 . kernel 4.4.32.
原先我们使用Spansion S34ML08G101TF100这个芯片。
手册上写是 1GB capacity.2k page.128k block and 512 sub-page size.
使用默认的BCH8 ECC。 uboot 和kernel dts里面都是BCH8。
工作正常。
现在要换成三星的K9K8G08U0E
我看了下芯片手册，发现page/block/sub-page size之类的都是一样的。
所以觉得好像不用改代码。
但在第一次启动后，一旦重启，就出现下面错误：
nand: device found, Manufacturer ID: 0xec, Chip ID: 0xd3
nand: Samsung NAND 1GiB 3,3V 8-bit
nand: 1024 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
nand: using OMAP_ECC_BCH8_CODE_HW ECC scheme
9 ofpart partitions found on MTD device 8000000.nand
Creating 9 MTD partitions on "8000000.nand":
0x000000000000-0x000000020000 : "NAND.SPL"
0x000000020000-0x000000040000 : "NAND.SPL.backup1"
0x000000040000-0x000000060000 : "NAND.SPL.backup2"
0x000000060000-0x000000080000 : "NAND.SPL.backup3"
0x000000080000-0x000000260000 : "NAND.u-boot"
0x000000260000-0x000000280000 : "NAND.u-boot-env"
0x000000280000-0x000000580000 : "NAND.LOGO"
0x000000580000-0x000000a80000 : "NAND.kernel"
0x000000a80000-0x000040000000 : "rootfs"
ubi0: attaching mtd8
omap2-nand 8000000.nand: uncorrectable bit-flips found
omap2-nand 8000000.nand: uncorrectable bit-flips found
omap2-nand 8000000.nand: uncorrectable bit-flips found
omap2-nand 8000000.nand: uncorrectable bit-flips found
ubi0 warning: ubi_io_read: error -74 (ECC error) while reading 64 bytes from PEB 1885:0, read only 64 bytes, retry
omap2-nand 8000000.nand: uncorrectable bit-flips found
omap2-nand 8000000.nand: uncorrectable bit-flips found
omap2-nand 8000000.nand: uncorrectable bit-flips found
omap2-nand 8000000.nand: uncorrectable bit-flips found
ubi0 warning: ubi_io_read: error -74 (ECC error) while reading 64 bytes from PEB 1885:0, read only 64 bytes, retry
不知为何ECC老是报错？
我把spec和dts贴上
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
/ {
model = "TI AM335x EVM";
compatible = "ti,am335x-evm", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
};
lis3_reg: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "lis3_reg";
regulator-boot-on;
};
wlan_en_reg: fixedregulator@2 {
compatible = "regulator-fixed";
regulator-name = "wlan-en-regulator";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
/* WLAN_EN GPIO for this board - Bank1, pin16 */
gpio = <&gpio1 16 0>;
/* WLAN card specific delay */
startup-delay-us = <70000>;
enable-active-high;
};
backlight {
compatible = "pwm-backlight";
pwms = <&ehrpwm1 1 50000 0>;
brightness-levels = <0 51 53 56 62 75 101 152 255>;
default-brightness-level = <8>;
};
panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_s0>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <32>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
800x480p62 {
clock-frequency = <30000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <40>;
hback-porch = <88>;
hsync-len = <48>;
vback-porch = <32>;
vfront-porch = <13>;
vsync-len = <3>;
hsync-active = <1>;
vsync-active = <1>;
pixelclk-active = <0>;
};
};
};
leds {
pinctrl-names = "default";
pinctrl-0 = <&user_leds_default>;
compatible = "gpio-leds";
usb1_5v_power {
label = "usb1_5v_power";
gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
default-state = "on";
};
};
};
/*
* pin number = value in "AM335x Technical Reference Manual Table 9-10. CONTROL_MODULE REGISTERS" - 0x800
*/
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x180 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rxd.i2c1_sda */
0x184 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_txd.i2c1_scl */
>;
};
touchscreen_pins: pinmux_touchscreen_pins {
pinctrl-single,pins = <
0x54 (PIN_OUTPUT | MUX_MODE7) /* gpmc_a5.gpio1_21 GPIO1_21_TCH_RST */
0x50 (PIN_INPUT | MUX_MODE7) /* gpmc_a4.gpio1_20 GPIO1_20_TCH_INT */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
nandflash_pins_s0: nandflash_pins_s0 {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wpn.gpmc_wpn */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* RMII1_REFCLK */
0x124 (PIN_OUTPUT | MUX_MODE1) /* RMII1_TXD1 */
0x128 (PIN_OUTPUT | MUX_MODE1) /* RMII1_TXD0 */
0x114 (PIN_OUTPUT | MUX_MODE1) /* RMII1_TXEN */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* RMII1_RXD1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* RMII1_RXD0 */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* RMII1_CRS_DV */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* RMII1_RXERR */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_REFCLK */
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_TXD1 */
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_TXD0 */
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_TXEN */
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_RXD1 */
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_RXD0 */
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_CRS_DV */
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* RMII1_RXERR */
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
>;
};
lcd_pins_s0: lcd_pins_s0 {
pinctrl-single,pins = <
0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
>;
};
ehrpwm1_pins_default: backlight_pins {
pinctrl-single,pins = <
0x4c (PIN_OUTPUT | MUX_MODE6) /* GPIO1_19_LCD_PWM_1B gpmc_a3=ehrpwm1B_mux1 MODE6 */
>;
};
user_leds_default: user_leds_default {
pinctrl-single,pins = <
0x234 (PIN_OUTPUT | MUX_MODE7) /* conf_usb1_drvvbus.gpio3_13 GPIO3_13_USB1_POWER */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <400000>;
gt911a: gt911a@5d {
compatible = "goodix,gt911a";
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
reg = <0x5d>;
interrupt-parent = <&gpio1>;
interrupts = <20 2>;
reset-gpios = <&gpio1 21 0>;
int-gpios = <&gpio1 20 0>;
};
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&cppi41dma {
status = "okay";
};
&lcdc {
status = "okay";
blue-and-red-wiring = "crossed";
};
&elm {
status = "okay";
};
&epwmss1 {
status = "okay";
ehrpwm1: pwm@48302200 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ehrpwm1_pins_default>;
};
};
&gpmc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins_s0>;
ranges = <0 0 0x08000000 0x20000000>; /* CS0: NAND */
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
<1 IRQ_TYPE_NONE>; /* termcount */
rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
read-only;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
read-only;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
read-only;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
read-only;
};
partition@4 {
label = "NAND.u-boot";
reg = <0x00080000 0x001E0000>;
read-only;
};
partition@5 {
label = "NAND.u-boot-env";
reg = <0x00260000 0x00020000>;
read-only;
};
partition@6 {
label = "NAND.LOGO";
reg = <0x00280000 0x00300000>;
read-only;
};
partition@7 {
label = "NAND.kernel";
reg = <0x00580000 0x00500000>;
read-only;
};
partition@8 {
label = "rootfs";
reg = <0x00A80000 0x3F580000>;
};
};
};
#include "tps65910.dtsi"
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1351500>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-always-on;
};
vmmc_reg: regulator@12 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
&mac {
slaves = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "rmii";
};
&phy_sel {
rmii-clock-ext;
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
&sham {
status = "disabled";
};
&aes {
status = "disabled";
};
&rng {
status = "disabled";
};
&wkup_m3_ipc {
ti,scale-data-fw = "am335x-evm-scale-data.bin";
};
&sgx {
status = "okay";
};
谢谢各位。
================
问题解决了
多谢网友 yongqing wang的帮助
怎么解决的，我就不贴出来了。
因为ti的fae无一回复我的邮件，支持的太烂，让人失望。
而且删贴倒是速度一流，我刚刚发了这段话，就被秒删了。
你们删贴删那么快，回帖倒是好多天都不见有人回。真能啊你们。
