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If any sections of the DSP memory map are located in DSP L2 RAM (0x11800000), be aware of two things:
1: Make sure all L2 RAM addresses in the DSP linker command file are referenced in the 0x118xxxxx range and not 0x008xxxxx, as the ARM cannot write to the 0x008xxxxx address range
2: Use the "Configure PSC" function of AISGen to enable the DSP LPSC (PSC0,#15). If the DSP megamodule is in reset, the L2 RAM will not be accessible so the section loads will fail. The AISGen CFG file included with this project enables PSC0,#15 by default
