This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

如何开启AM335x的L1/L2 Cache ECC功能



我查了TI的文档,说是这是arm内核的功能,其他没有说明。

ARM Cortex A8 TRM里面对于ECC的介绍,需要在L2 CACR寄存器中使能,但是L2 CACR的访问必须是Secure state条件,而正常情况下是NonSecure state,需要切换Secure的状态则必须在Monitor mode 下,而在非Monitor mode 并且为NonSecure state下,内核不允许直接切换到Monitor mode.......

说的有点乱,也可能我理解有问题,简而言之,我想知道的是AM335x如何使能L1/L2 ECC功能,有没有哪位大神来解答一下,元芳你怎么看?

YanTCK