This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
C6748 的CMD中区都是放在DDR2中，ENET_ECHO例程烧写到NOR或NAND都没问题，网络正常。
发现运行速度慢，尝试CMD修改放到RAM中运行，仿真器可以跑，但是烧写到NOR或NAND后网络都起不来（创龙开发板）。
求助有办法或有尝试过的吗？
您好，感谢您的回复，如您所说将如下CMD加入工程，仿真器运行ENET_ECHO原始工程，采用静态IP，网络连接不上,改回原来CMD可以。
然后烧写到NOR中测试，同样网络连接不上。
请问有没有其他需要注意的项？
//C6748_RAM.cmd
// ============================================================================ // Linker Command File for Linking c674 DSP Programs // // These linker options are for command line linking only. For IDE linking, // you should set your linker options in Project Properties. // -c Link Using C Conventions // -stack 0x1000 Software Stack Size // -heap 0x1000 Heap Area Size // =========================================================================== -stack 0x1000 -heap 0x1000 // ============================================================================ // Specify the System Memory Map // ============================================================================ MEMORY { L1P: o = 0x11E00000 l = 0x00008000 L1D: o = 0x11F00000 l = 0x00008000 L2: o = 0x11800000 l = 0x00040000 DDR: o = 0xC0000000 l = 0x08000000 } // ============================================================================ // Specify the Sections Allocation into Memory // ============================================================================ SECTIONS { .cinit > L2 // Initialization Tables .pinit > L2 // Constructor Tables .init_array > L2 // .binit > L2 // Boot Tables .const > L2 // Constant Data .switch > L2 // Jump Tables .text > L2 // Executable Code .text:_c_int00: align=1024 > L2 // Entrypoint GROUP (NEARDP_DATA) // group near data { .neardata .rodata .bss // note: removed fill = 0 } > L2 .far: fill = 0x0, load > L2 // Far Global & Static Variables .fardata > L2 // Far RW Data .stack > L2 // Software System Stack .sysmem > L2 // Dynamic Memory Allocation Area .cio > L2 // C I/O Buffer .vecs > L2 // Interrupt Vectors }
