C66x中的PCIE和上位机、SRIO的中断问题

  我用的C6678的PCIE与上位机相连，通过SRIO与FPGA相连，采用bootloader方式启动，启动上位机之后，开始执行PCIE的ISR，ISR中有多个mode，没执行完一个，就向PCIE_EP_IRQ_SET寄存器写1，直到mode不在变化，我在mode结束之后，执行向EP_IRQ_CLR写0的操作，来禁止这个中断，不过最后，并没有进入到SRIO的ISR。

PCIE的ISR如下：

printf("DSP receives interrupt from host.\n");
Int32 i=0,j=0,k=0,h=0,q=0;
Int32 Flag = 0;
/* Disable host interrupt */
CSL_CPINTC_disableHostInterrupt (hnd, HOST_INT_NUM_CIC0_PCIE);

/* clear PCIE interrupt */
DEVICE_REG32_W(PCIE_LEGACY_A_IRQ_STATUS, 0x1);
DEVICE_REG32_W(PCIE_IRQ_EOI, 0x0);

// Clears the system interrupt
CSL_CPINTC_clearSysInterrupt (hnd, PCIEXpress_Legacy_INTA);
CSL_CPINTC_enableHostInterrupt (hnd, HOST_INT_NUM_CIC0_PCIE);

/* do operations */

//....................................

//Host_To_Dsp_isr_Func(arg); //this function may be in other file.

UInt32 Pcie_Mode = DEVICE_REG32_R(0x10800008);//;
UInt32 Cpu_data_length = DEVICE_REG32_R(0x1080000C);//DEVICE_REG32_R(0x8200000C);
UInt32 Cpu_data_srcaddr = 0x82000100;
UInt32 Cpu_data_dstaddr = 0x00000000;

UInt32 DSP_Read_FPGA_srcaddr = DEVICE_REG32_R(0x10800018);
UInt32 DSP_Read_FPGA_dstaddr = 0x10800010;

if(Pcie_Mode == 1)
{

i = 0xABAB4141;
DEVICE_REG32_W(0x10800040,i);
Pciedma_Srio_mk();
SendInterruptToHost();
//Dsp_config_fpga_mk();
printf("mode 1 over\n");
}
else if(Pcie_Mode == 2)
{
if(Cpu_data_length != 0)
{
Flag++;
DEVICE_REG32_W(0x10800044,j);
WriteFpgaByDioSockets_nwrite_mk (Cpu_data_dstaddr,(Uint8*) Cpu_data_srcaddr,8*Cpu_data_length);
if(Flag == 2){
//q = DEVICE_REG32_R(0x80000040);
q = 0;
DEVICE_REG32_W(0x10800080,Flag);
}
SendInterruptToHost();
printf("mode 2 over\n");
}
else
{
j++;
DEVICE_REG32_W(0x10800050,j);
SendInterruptToHost();
//ClearInterruptToHost();
}
}
else if(Pcie_Mode == 3)
{
k++;
DEVICE_REG32_W(0x10800048,k);
Dsp_config_fpga_mk();
TSC_delay_ms(1000);
SrioInit();
printf("mode 3 over\n");
}
else if(Pcie_Mode == 4)
{
h++;
DEVICE_REG32_W(0x1080004C,h);
ReadFpgaByDioSockets (DSP_Read_FPGA_srcaddr,(Uint8*) DSP_Read_FPGA_dstaddr,8);
//SendInterruptToHost();
ClearInterruptToHost();
printf("mode 4 over\n");
}

其中，有个mode执行了srio_init(),但是srio_init在main函数中已经执行了，不知道会不会影响

下面是srio的中断初始化

Void ConfigDoorbellGeneralInterrupt(Srio_DrvHandle hSrioDrv,UInt unSysInt,UInt unhostInt,CpIntc_FuncPtr pFxn)
{

Int32 eventId = 0;
/* SRIO DIO Interrupts need to be routed from the CPINTC0 to GEM Event.
* - We have configured DIO Interrupts to get routed to Interrupt Destination 0
* (Refer to the CSL_SRIO_RouteLSUInterrupts API configuration in the SRIO Initialization)
* - We want this System Interrupt to mapped to Host Interrupt 8 */

/* Get the CSL SRIO Handle. */
hSrioCSL = CSL_SRIO_Open (0);
if (hSrioCSL == NULL)
System_printf ("*************************************************************\n");

// Disable Interrupt Pacing for INTDST0
CSL_SRIO_DisableInterruptPacing (hSrioCSL, 0);

// Route LSU0 ICR0 to INTDST0
CSL_SRIO_RouteLSUInterrupts (hSrioCSL, 0, 0);

// Route LSU0 ICR1 to INTDST0
CSL_SRIO_RouteLSUInterrupts (hSrioCSL, 1, 0);

// Route LSU0 ICR2 to INTDST0
CSL_SRIO_RouteLSUInterrupts (hSrioCSL, 2, 0);

/* Map the System Interrupt i.e. the Interrupt Destination 0 interrupt to the DIO ISR Handler. */
CpIntc_dispatchPlug(unSysInt, (CpIntc_FuncPtr)pFxn, (UArg)hSrioDrv, TRUE);

/* The configuration is for CPINTC0. We map system interrupt 112 to Host Interrupt 8. */
CpIntc_mapSysIntToHostInt(0, unSysInt, unhostInt);

/* Enable the Host Interrupt. */
CpIntc_enableHostInt(0, unhostInt);

/* Enable the System Interrupt */
CpIntc_enableSysInt(0, unSysInt);

/* Get the event id associated with the host interrupt. */
eventId = CpIntc_getEventId(unhostInt);

/* Plug the CPINTC Dispatcher. */
EventCombiner_dispatchPlug (eventId, CpIntc_dispatch, unhostInt, TRUE);
}