FPGA给DSP发送数据,使用GPIO作为中断,使用管脚0:
问题:
1、FPGA端是使用上升沿或下降沿来触发中断,还是上升沿和下降沿?
2、DSP这边配置是下面这样的么?
void gpioInit(void)
{
int32_t pinNum;
CSL_GpioHandle hGpio;
// Open the CSL GPIO Module 0
hGpio = CSL_GPIO_open (0);
// Disable the GPIO global interrupts
CSL_GPIO_bankInterruptDisable(hGpio, GPIOBANKNUM);
// Clear all falling edge trigger and rising edge trigger
//for (pinNum = GPIO_0; pinNum <= GPIO_15; pinNum++) {
//CSL_GPIO_clearFallingEdgeDetect(hGpio, pinNum);
//CSL_GPIO_clearRisingEdgeDetect (hGpio, pinNum);
//}
// Set all GPIO as input
// GPIOREGS->DIR = GPIOREGS->DIR & 0xffffffff;
// Configure the GPIOs for NAND flash controller communication
// Configure data bus as output
//gpioSetDataBusDirection(GPIO_OUT);
CSL_GPIO_clearFallingEdgeDetect(hGpio, 0);
CSL_GPIO_clearRisingEdgeDetect (hGpio, 0);
// Configure the signal pins direction
//gpioSetDirection(DSP_FPGA_CMD0, GPIO_OUT );
//gpioSetDirection(DSP_FPGA_CMD1, GPIO_OUT );
//gpioSetDirection(DSP_FPGA_STROBE, GPIO_OUT );
gpioSetDirection(0, GPIO_IN );
}