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测试6678代码运行的时间



您好!想测试一段代码在6678上运行的时间。通过_itoll(TSCH, TSCL)读取寄存器里面的数值,进行前后比较。通过这种方法得到的寄存器值的变化为4336995703,而6678的CPU主频为1GHz,这种方法得到的代码运行时间为4.34秒左右,但是我通过秒表测量得到的时间却是9.5秒。想问一下为什么会有这么大的差异?谢谢!

  • 如果你确定你的秒表和测试方法没有问题 :),那有可能是6678的主频没有跑到1GHz,你可以检查一下相关PLL的配置。

  • 您好!我在给板子上电连接之后,使用CCS中的GEL文件初始化,以下是所显示的。PLL的配置是不是就是DSP @ 1000.0 MHz.种显示的?

    C66xx_0: GEL Output: Global Default Setup...
    C66xx_0: GEL Output: C6678L GEL file Ver is 1.4
    C66xx_0: GEL Output: Setup Cache...
    C66xx_0: GEL Output: L1P = 32K
    C66xx_0: GEL Output: L1D = 32K
    C66xx_0: GEL Output: L2 = ALL SRAM
    C66xx_0: GEL Output: Setup Cache... Done.
    C66xx_0: GEL Output: PLL1 Setup...
    C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
    C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
    C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
    C66xx_0: GEL Output: PLL1 Setup... Done.
    C66xx_0: GEL Output: Power on all PSC modules and DSP domains...
    C66xx_0: GEL Output: Set_PSC_State... Timeout Error #03 pd=2, md=9!
    C66xx_0: GEL Output: Power on all PSC modules and DSP domains... Done.
    C66xx_0: GEL Output: PA PLL is using SYSCLK/ALTCORECLK as the input
    C66xx_0: GEL Output: PA PLL is in PLL mode
    C66xx_0: GEL Output: PA PLL fixed output divider = 2
    C66xx_0: GEL Output: PA PLL programmable multiplier = 21
    C66xx_0: GEL Output: PA PLL programmable divider = 1
    C66xx_0: GEL Output: the output frequency should be 10 times the PA reference clock
    C66xx_0: GEL Output: configSGMIISerdes Setup... Begin
    C66xx_0: GEL Output:
    SGMII SERDES has been configured.
    C66xx_0: GEL Output: Enabling EDC ...
    C66xx_0: GEL Output: L1P error detection logic is enabled.
    C66xx_0: GEL Output: L2 error detection/correction logic is enabled.
    C66xx_0: GEL Output: MSMC error detection/correction logic is enabled.
    C66xx_0: GEL Output: Enabling EDC ...Done
    C66xx_0: GEL Output: Configuring CPSW ...
    C66xx_0: GEL Output: Configuring CPSW ...Done
    C66xx_0: GEL Output: DDR begin (1333 auto)
    C66xx_0: GEL Output: XMC Setup ... Done
    C66xx_0: GEL Output:
    DDR3 initialization is complete.
    C66xx_0: GEL Output: DDR done
    C66xx_0: GEL Output: Global Default Setup... Done.

  • 你测试小一点的任务会有什么情况?

    你的测试是在TI的EVM板上做的么?

    如果时钟准确,通过TSCL测试的cycles、时间是准确的,应该是其他问题导致的

  • 您好!我的测试不是在TI的EVM上进行的,是在请公司做的板子上进行的。您说的其他问题有可能是?

  • 你可以在TI EVM上对比测试一下。因为你用的是自己的单板,时钟频率很有可能和TI EVM不一样,GEL文件的内容需要做相应的修改才能够让DSP工作在合适的频率。

  • 奥,好的,谢谢,我再尝试一下。