如何理解C6678中对预取数据的描述？

chenpjh

在C6678中有这样的描述：

"The L2 cache indicates to the XMC if a given line-fill was triggered by a L1P memory controller or L1D memory controller request. This enables the prefetch buffer to apply
different filtering to each request."

即然L1D或L1P申请了数据，为什么还要根据MAR的配置进行预取的操作。

12 年多前

0 Jane Lu 12 年多前

TI__Expert 4250 points

Hi Chenpjh,

preftech buffer是独立于L1D 和 L1P之外的硬件，用于预取数据。两者的主要区别为：

Prefetch controllers read data from memory before the DSP needs them - Cache controllers read data from memory when the DSP needs them

prefetch buffer 分为data prefetch 和program preftch，所以需要 L2 cache indicates to the XMC if a given line-fill was triggered by a L1P memory controller or L1D memory controller request.

关于prefetch buffer的详细内容可参考user guider sprugw0b.

http://www.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=sprugy8&fileType=pdf

Jane

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如何理解C6678中对预取数据的描述？