DM8168 DVRRDK开发包 视频驱动架构

不好意思，我就是指的DM8168，上次打错了，打成了6467。麻烦您给我解释一下我那个问题，麻烦了。我不太清楚DVRRDK和V4L2架构的关系，我看完DVRRDK后，感觉好像视频编解码器驱动不需要V4L2架构驱动了似的，好像DVRRDK开发板带了个HDVPSS驱动来完成视频编解码器驱动。是这么吗？麻烦您给我介绍一下

通过V4L2来调用HDVPSS driver在RDK中是支持的，在HDVPSS user guide中，有如下描述

Linux FrameBuffer Driver
This section primarily describes about the drivers which are not the part of HDVPSS package but uses the HDVPSS
drivers. Those drivers includes Linux framebuffer driver on Graphics pipeline, V4L2 display and capture driver on
display and VIP pipelines respectively. Details about all those drivers can be found at http:/ / processors. wiki. ti.
com/ index. php/ TI81XX_PSP_User_Guide

是的，昨天我看到了这个介绍了，我还有个疑问：

ti提供的内核源代码中，利用V4L2架构调用dvrrdk中HDVPSS驱动的源码是否完善？还是说这部分调用驱动需要我们开发者自己来完善？

在TI81XX PSP VPSS VIDEO Driver user guide中，有关于V4L2支持的详细描述：

• Supports customized display resolution over On-Chip HDMI interface.
• cropping, positioning is supported at /dev/video3 node
• V4L2 display nodes are /dev/video1, /dev/video2, /dev/video3
• V4L2 capture nodes are /dev/video0, /dev/video4, /dev/video5 and /dev/video6.
• Above nodes are created only when ti81xxvo.ko is loaded followed by ti81xxvin.ko
• V4L2 capture streaming is supported only on /dev/video0 node with TVP7002 as decoder.

The VPSS driver supports the following features:

• 3 Graphics pipelines through FBDev interface
• 3 Video pipelines through V4L2 interface
• 2 VIP capture instances of VPSS through V4L2 interface.
• Each of the VIP capture instances can either behave as 2 8-bit port or 1 16/24 bit port.
• Color formats on Graphics pipeline: RGB565, ARGB1555, RGBA5551, ARGB4444, RGBA4444, ARGB6666,RGBA6666,RGB888, ARGB8888 and RGBA8888, BMP 1/2/4/8.
• Color formats on Video pipeline; 422 Interleave, 420 semi-planar and 422 semi-planar.
• Color formats on VIP port are YUV422 interleaved, YUV422 semi-planar, YUV420 semi-planar and RGB888.
• Cropping and scaling for YUV color formats on V4L2 capture driver. Only downscaling is supported.
• Configuration of display parameters such as height and width of display graphics, position of the display graphics, bits-per-pixel etc.
• Setting up of Graphics pipelines/Video pipelines and VENCs destination(HDMI, HDCOMP, DVO2 or SD) through syfs interface.
• Buffer management through memory mapped (mmaped) on both FBDev and V4l2.
• User pointer buffer exchange for application usage on V4L2 only.
• Global alpha blending on RGB format, pixel alpha blending on ARGB/RGBA format and palette alpha blending on BMP formats.
• Colorkeying on graphics pipelines through FBDev.
• Boundbox on graphcis pipelines through FBDev
• Display priority on graphics pipelines through FBDev
• Scaling on graphics pipeline through FBDev
• Stenciling on graphics pipeline through FBDev
• Global alpha blending on video pipeline through V4L2
• Colorkeying on video pipeline through V4L2
• Various display resolutions on HDMI/HDCOMP VENCs through sysfs
• Various Video PLL frequency through sysfs
• Various VENC clock source through sysfs
• Various output for VENC through sysfs.
• Reshuffle display order through sysfs
• Customized timing for VENC through sysfs

文档请参考：

1. http://processors.wiki.ti.com/index.php/TI81XX_PSP_VPSS_Video_Driver_User_Guide

2. RDK 包中的 \ti_tools\linux_lsp\ 下面的doc文件夹中的VPSS文档。