你好,一般使用中断都是写好普通中断函数,然后在中断初始化函数中将中断函数注册响应的中断号即可,例如下面这样:
/*******************************************************************************
* @函数名称 UART0_INT_Init
* @函数说明 串口0中断初始化函数
* @输入参数 无
* @输出参数 无
* @返回参数 无
*******************************************************************************/
void UART0_INT_Init()
{
unsigned int intFlags = 0;
// 使能中断
intFlags |= (UART_INT_LINE_STAT | \
UART_INT_TX_EMPTY | \
UART_INT_RXDATA_CTI);
UARTIntEnable(SOC_UART_0_REGS, intFlags);
intFlags |= ( UART_FCR_FIFOEN | \
UART_FCR_DMAMODE1);
UARTDMAEnable(SOC_UART_0_REGS, intFlags);
// 禁用发送中断
UARTIntDisable(SOC_UART_0_REGS, UART_INT_TX_EMPTY);
CICDisableGlobalHostInt(SOC_CIC_0_REGS);
CICEventMap(SOC_CIC_0_REGS, INTC0_UARTINT_A, uiCIC_out_num);
CICEnableGlobalHostInt(SOC_CIC_0_REGS);
IntRegister(C66X_MASK_INT6, UART0_Isr);
IntEventMap(C66X_MASK_INT6, SYS_INT_CIC0_OUT0_20);
IntEnable(C66X_MASK_INT6);
}
平时都使用上面这种方式,没有什么问题。
但是最近看到一个例程,使用interrupt关键字定义,但是并未在其他地方进行中断注册,这种方式的实现原理是什么,在哪里有具体的讲解?代码如下:
interrupt void GE_Message_ISR()
{
EMAC_Desc *pDesc;
int recv_bytes = 0;
puts("Hello");
//EMAC_Recv((Uint8 *)0x10880000);
/* check for new packet */
if(emac_mcb.lastrxhdp == (Uint32)EMAC_REGS->RX0HDP)
//return 0;
return;
pDesc = (EMAC_Desc *)EMAC_REGS->RX0CP;
if (pDesc->PktFlgLen & EMAC_DSC_FLAG_SOP) {
/* Acknowledge recevied packet */
EMAC_REGS->RX0CP = (Uint32)pDesc;
/* store bytes recevied */
recv_bytes = pDesc->PktFlgLen & 0xFFFF;
/* optionally copy data to output buffer */
memcpy((Uint8 *)0x10880000, pDesc->pBuffer, recv_bytes);
parserRxPacket(pDesc);
/* re-initalize descriptor to recevie more data */
pDesc->BufOffLen = RX_BUFF_SIZE;
pDesc->PktFlgLen = EMAC_DSC_FLAG_OWNER;
/* assign descriptor to HDP */
if (0 == (Uint32)EMAC_REGS->RX0HDP)
{
EMAC_REGS->RX0HDP = (Uint32)pDesc;
}
else
{
((EMAC_Desc *) (emac_mcb.lastrxhdp))->pNext = pDesc;
}
emac_mcb.lastrxhdp = (Uint32)pDesc;
/* For debug purpose */
// printf("Receive packet length = %d,\n", recv_bytes);
}
EMAC_REGS->MACEOIVECTOR = 0x01;
return;
}
void GE_Interrupts_Init(void)
{
/* Disable Global host interrupts. */
gpCIC0_regs->GLOBAL_ENABLE_HINT_REG= 0;
/* Configure no nesting support in the CPINTC Module. */
gpCIC0_regs->CONTROL_REG= ((gpCIC0_regs->CONTROL_REG&
~CSL_CPINTC_CONTROL_REG_NEST_MODE_MASK)|
(CPINTC_NO_NESTING<<CSL_CPINTC_CONTROL_REG_NEST_MODE_SHIFT));
/* Clear Interrupt events in MDIO*/
// gpMDIO_regs->LINK_INT_RAW_REG= 0xFFFFFFFF;
/* Enable Global host interrupts. */
gpCIC0_regs->GLOBAL_ENABLE_HINT_REG= 1;
/* Enable EMAC RX interrupts in the control module */
ECTL_REGS->C0_RX_EN = 0xFF;
/*map EMAC RX interrupt to INT4 */
gpCGEM_regs->INTMUX1 = 99<<CSL_CGEM_INTMUX1_INTSEL4_SHIFT;
/*Clear all DSP core events*/
gpCGEM_regs->EVTCLR[0]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[1]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[2]= 0xFFFFFFFF;
gpCGEM_regs->EVTCLR[3]= 0xFFFFFFFF;
//clear DSP core interrupt flag
ICR= IFR;
//enable INT4 and INT5
IER = 3|(1<<4)|(1<<5);
/*Interrupt Service Table Pointer to begining of LL2 memory*/
ISTP= 0x800000;
//enable GIE
TSR = TSR|1;
}