Xilinx First Stage Boot Loader
Release 2017.4 Oct 28 2019-16:56:08
Devcfg driver initialized
Silicon Version 3.1
Boot mode is SD
SD: rc= 0
SD Init Done
Flash Base Address: 0xE0100000
Reboot status register: 0x60400000
Multiboot Register: 0x0000C000
Image Start Address: 0x00000000
Partition Header Offset:0x00000C80
Partition Count: 2
Partition Number: 1
Header Dump
Image Word Len: 0x0002082A
Data Word Len: 0x0002082A
Partition Word Len:0x0002082A
Load Addr: 0x04000000
Exec Addr: 0x04000000
Partition Start: 0x000065D0
Partition Attr: 0x00000010
Partition Checksum Offset: 0x00000000
Section Count: 0x00000001
Checksum: 0xF7F97F50
Application
Handoff Address: 0x04000000
In FsblHookBeforeHandoff function
SUCCESSFUL_HANDOFF
FSBL Status = 0x1
U-Boot 2018.01 (Dec 26 2019 - 10:49:02 +0800)
Model: Zynq Zed Development Board
Board: Xilinx Zynq
Silicon: v3.1
DRAM: ECC disabled 512 MiB
MMC: sdhci@e0100000: 0 (SD)
SF: Detected n25q128 with page size 256 Bytes, erase size 64 KiB, total 16 MiB
*** Warning - bad CRC, using default environment
In: serial@e0001000
Out: serial@e0001000
Err: serial@e0001000
Net: ZYNQ GEM: e000b000, phyaddr 0, interface rgmii-id
eth0: ethernet@e000b000
Hit any key to stop autoboot: 2 1 0
Device: sdhci@e0100000
Manufacturer ID: 9c
OEM: 534f
Name: USD00
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.7 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
** Unable to read file uEnv.txt **
Copying Linux from SD to RAM...
reading uImage
4164216 bytes read in 245 ms (16.2 MiB/s)
reading zynq-zed.dtb
9975 bytes read in 17 ms (572.3 KiB/s)
reading uramdisk.image.gz
1098996 bytes read in 79 ms (13.3 MiB/s)
## Booting kernel from Legacy Image at 02080000 ...
Image Name: Linux-4.19.0-xilinx
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 4164152 Bytes = 4 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Loading init Ramdisk from Legacy Image at 04000000 ...
Image Name: ramdisk
Image Type: ARM Linux RAMDisk Image (gzip compressed)
Data Size: 1098932 Bytes = 1 MiB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02000000
Booting using the fdt blob at 0x2000000
Loading Kernel Image ... OK
Loading Ramdisk to 1ea0b000, end 1eb174b4 ... OK
Loading Device Tree to 1ea05000, end 1ea0a6f6 ... OK
Starting kernel ...
Booting Linux on physical CPU 0x0
Linux version 4.19.0-xilinx (root@ubuntu) (gcc version 4.9.1 20140710 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.07 - Linaro GCC 4.9-2014.07)) #4 SMP PREEMPT Thu Dec 26 16:49:05 CST 2019
CPU: ARMv7 Processor [413fc090] revision 0 (ARMv7), cr=18c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
OF: fdt: Machine model: Avnet ZedBoard board
Memory policy: Data cache writealloc
cma: Reserved 16 MiB at 0x1f000000
random: get_random_bytes called from start_kernel+0x7c/0x3c8 with crng_init=0
percpu: Embedded 16 pages/cpu @(ptrval) s35968 r8192 d21376 u65536
Built 1 zonelists, mobility grouping on. Total pages: 130048
Kernel command line:
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
Memory: 492044K/524288K available (6144K kernel code, 203K rwdata, 1612K rodata, 1024K init, 134K bss, 15860K reserved, 16384K cma-reserved, 0K highmem)
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xe0800000 - 0xff800000 ( 496 MB)
lowmem : 0xc0000000 - 0xe0000000 ( 512 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0x(ptrval) - 0x(ptrval) (7136 kB)
.init : 0x(ptrval) - 0x(ptrval) (1024 kB)
.data : 0x(ptrval) - 0x(ptrval) ( 204 kB)
.bss : 0x(ptrval) - 0x(ptrval) ( 135 kB)
rcu: Preemptible hierarchical RCU implementation.
rcu: RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
Tasks RCU enabled.
rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=2
NR_IRQS: 16, nr_irqs: 16, preallocated irqs: 16
efuse mapped to (ptrval)
slcr mapped to (ptrval)
L2C: platform modifies aux control register: 0x72360000 -> 0x72760000
L2C: DT/platform modifies aux control register: 0x72360000 -> 0x72760000
L2C-310 erratum 769419 enabled
L2C-310 enabling early BRESP for Cortex-A9
L2C-310 full line of zeros enabled for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at (ptrval)
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
Switching to timer-based delay loop, resolution 3ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at (ptrval), irq=17
Console: colour dummy device 80x30
console [tty0] enabled
Calibrating delay loop (skipped), value calculated using timer frequency.. 666.66 BogoMIPS (lpj=3333333)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 1024 (order: 0, 4096 bytes)
Mountpoint-cache hash table entries: 1024 (order: 0, 4096 bytes)
CPU: Testing write buffer coherency: ok
CPU0: Spectre v2: using BPIALL workaround
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x100000 - 0x100060
rcu: Hierarchical SRCU implementation.
smp: Bringing up secondary CPUs ...
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
CPU1: Spectre v2: using BPIALL workaround
smp: Brought up 1 node, 2 CPUs
SMP: Total of 2 processors activated (1333.33 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
futex hash table entries: 512 (order: 3, 32768 bytes)
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
DMA: preallocated 256 KiB pool for atomic coherent allocations
cpuidle: using governor menu
hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
hw-breakpoint: maximum watchpoint size is 4 bytes.
zynq-ocm f800c000.ocmc: ZYNQ OCM pool: 256 KiB @ 0x(ptrval)
zynq-pinctrl 700.pinctrl: zynq pinctrl initialized
e0001000.serial: ttyPS0 at MMIO 0xe0001000 (irq = 25, base_baud = 3125000) is a xuartps
console [ttyPS0] enabled
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
media: Linux media interface: v0.10
videodev: Linux video capture interface: v2.00
pps_core: LinuxPPS API ver. 1 registered
pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
PTP clock support registered
EDAC MC: Ver: 3.0.0
FPGA manager framework
Advanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm_global_timer
NET: Registered protocol family 2
tcp_listen_portaddr_hash hash table entries: 512 (order: 0, 6144 bytes)
TCP established hash table entries: 4096 (order: 2, 16384 bytes)
TCP bind hash table entries: 4096 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 4096 bind 4096)
UDP hash table entries: 256 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (no cpio magic); looks like an initrd
Freeing initrd memory: 1076K
hw perfevents: no interrupt-affinity property for /pmu@f8891000, guessing.
hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
workingset: timestamp_bits=30 max_order=17 bucket_order=0
jffs2: version 2.2. (NAND) (SUMMARY) © 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
io scheduler mq-deadline registered
io scheduler kyber registered
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
brd: module loaded
loop: module loaded
m25p80 spi0.0: found n25q128a13, expected s25fl256s1
m25p80 spi0.0: n25q128a13 (16384 Kbytes)
5 fixed-partitions partitions found on MTD device spi0.0
Creating 5 MTD partitions on "spi0.0":
0x000000000000-0x000000100000 : "qspi-fsbl-uboot"
0x000000100000-0x000000600000 : "qspi-linux"
0x000000600000-0x000000620000 : "qspi-device-tree"
0x000000620000-0x000000c00000 : "qspi-rootfs"
0x000000c00000-0x000001000000 : "qspi-bitstream"
libphy: Fixed MDIO Bus: probed
CAN device driver interface
libphy: MACB_mii_bus: probed
TI DP83822 e000b000.ethernet-ffffffff:1f: attached PHY driver [TI DP83822] (mii_bus:phy_addr=e000b000.ethernet-ffffffff:1f, irq=POLL)
macb e000b000.ethernet eth0: Cadence GEM rev 0x00020118 at 0xe000b000 irq 27 (00:0a:35:00:01:22)
e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ehci-pci: EHCI PCI platform driver
usbcore: registered new interface driver usb-storage
chipidea-usb2 e0002000.usb: e0002000.usb supply vbus not found, using dummy regulator
chipidea-usb2 e0002000.usb: Linked as a consumer to regulator.0
ci_hdrc ci_hdrc.0: unable to init phy: -110
ci_hdrc: probe of ci_hdrc.0 failed with error -110
i2c /dev entries driver
cdns-wdt f8005000.watchdog: Xilinx Watchdog Timer with timeout 10s
EDAC MC: ECC not enabled
Xilinx Zynq CpuIdle Driver started
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
sdhci-pltfm: SDHCI platform and OF driver helper
mmc0: SDHCI controller on e0100000.mmc [e0100000.mmc] using ADMA
ledtrig-cpu: registered to indicate activity on CPUs
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
fpga_manager fpga0: Xilinx Zynq FPGA Manager registered
NET: Registered protocol family 10
Segment Routing with IPv6
sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
NET: Registered protocol family 17
can: controller area network core (rev 20170425 abi 9)
NET: Registered protocol family 29
can: raw protocol (rev 20170425)
can: broadcast manager protocol (rev 20170425 t)
can: netlink gateway (rev 20170425) max_hops=1
Registering SWP/SWPB emulation handler
of-fpga-region fpga-full: FPGA Region probed
hctosys: unable to open rtc device (rtc0)
of_cfs_init
of_cfs_init: OK
ALSA device list:
No soundcards found.
RAMDISK: gzip image found at block 0
mmc0: new high speed SDHC card at address 59b4
mmcblk0: mmc0:59b4 USD00 14.7 GiB
mmcblk0: p1 p2
EXT4-fs (ram0): mounted filesystem with ordered data mode. Opts: (null)
VFS: Mounted root (ext4 filesystem) on device 1:0.
----------mount /sys as sysfs
mount: mounting sysfs on /sys failed: Device or resource busy
----------Starting mdev......
echo /sbin/mdev > /proc/sys/kernel/hotplug
mdev -s
IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
++ Starting telnet daemon
EXT4-fs (mmcblk0p2): recovery complete
EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[USER@HOSTNAME ~]# ifconfig
eth0 Link encap:Ethernet HWaddr 00:0A:35:00:01:22
inet addr:192.168.1.10 Bcast:192.168.1.255 Mask:255.255.255.0
UP BROADCAST MULTICAST MTU:1500 Metric:1
RX packets:0 errors:0 dropped:0 overruns:0 frame:0
TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
collisions:0 txqueuelen:1000
RX bytes:0 (0.0 B) TX bytes:0 (0.0 B)
Interrupt:29 Base address:0xb000
启动打印信息，可以识别加载对应的驱动，但是无法ping通，我的硬件连接如下
我使用的是zynq-zc702.dts编译的对应dtb，
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2011 - 2015 Xilinx
* Copyright (C) 2012 National Instruments Corp.
*/
/dts-v1/;
/include/ "zynq-7000.dtsi"
/ {
model = "Xilinx ZC702 board";
compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
aliases {
ethernet0 = &gem0;
i2c0 = &i2c0;
serial0 = &uart1;
spi0 = &qspi;
mmc0 = &sdhci0;
usb0 = &usb0;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x20000000>;
};
chosen {
bootargs = "";
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
autorepeat;
sw14 {
label = "sw14";
gpios = <&gpio0 12 0>;
linux,code = <108>; /* down */
wakeup-source;
autorepeat;
};
sw13 {
label = "sw13";
gpios = <&gpio0 14 0>;
linux,code = <103>; /* up */
wakeup-source;
autorepeat;
};
};
leds {
compatible = "gpio-leds";
ds23 {
label = "ds23";
gpios = <&gpio0 10 0>;
linux,default-trigger = "heartbeat";
};
};
usb_phy0: phy0@e0002000 {
compatible = "ulpi-phy";
#phy-cells = <0>;
reg = <0xe0002000 0x1000>;
view-port = <0x0170>;
drv-vbus;
};
};
&amba {
ocm: sram@fffc0000 {
compatible = "mmio-sram";
reg = <0xfffc0000 0x10000>;
};
};
&can0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_default>;
};
&clkc {
ps-clk-frequency = <33333333>;
};
&gem0 {
local-mac-address = [00 0a 35 00 01 03];
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <ðernet_phy>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem0_default>;
phy-reset-gpio = <&gpio0 11 0>;
phy-reset-active-low;
ethernet_phy: ethernet-phy@1f {
reg = <0x1f>;
device_type = "ethernet-phy";
};
};
&gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio0_default>;
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c0_default>;
pinctrl-1 = <&pinctrl_i2c0_gpio>;
scl-gpios = <&gpio0 50 0>;
sda-gpios = <&gpio0 51 0>;
i2c-mux@74 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x74>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
si570: clock-generator@5d {
#clock-cells = <0>;
compatible = "silabs,si570";
temperature-stability = <50>;
reg = <0x5d>;
factory-fout = <156250000>;
clock-frequency = <148500000>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
adv7511: hdmi-tx@39 {
compatible = "adi,adv7511";
reg = <0x39>;
adi,input-depth = <8>;
adi,input-colorspace = "yuv422";
adi,input-clock = "1x";
adi,input-style = <3>;
adi,input-justification = "right";
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
eeprom@54 {
compatible = "atmel,24c08";
reg = <0x54>;
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
gpio@21 {
compatible = "ti,tca6416";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
rtc@51 {
compatible = "nxp,pcf8563";
reg = <0x51>;
};
};
i2c@7 {
#address-cells = <1>;
#size-cells = <0>;
reg = <7>;
hwmon@52 {
compatible = "ti,ucd9248";
reg = <52>;
};
hwmon@53 {
compatible = "ti,ucd9248";
reg = <53>;
};
hwmon@54 {
compatible = "ti,ucd9248";
reg = <54>;
};
};
};
};
&pinctrl0 {
pinctrl_can0_default: can0-default {
mux {
function = "can0";
groups = "can0_9_grp";
};
conf {
groups = "can0_9_grp";
slew-rate = <0>;
io-standard = <1>;
};
conf-rx {
pins = "MIO46";
bias-high-impedance;
};
conf-tx {
pins = "MIO47";
bias-disable;
};
};
pinctrl_gem0_default: gem0-default {
mux {
function = "ethernet0";
groups = "ethernet0_0_grp";
};
conf {
groups = "ethernet0_0_grp";
slew-rate = <0>;
io-standard = <4>;
};
conf-rx {
pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
bias-high-impedance;
low-power-disable;
};
conf-tx {
pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
bias-disable;
low-power-enable;
};
mux-mdio {
function = "mdio0";
groups = "mdio0_0_grp";
};
conf-mdio {
groups = "mdio0_0_grp";
slew-rate = <0>;
io-standard = <1>;
bias-disable;
};
};
pinctrl_gpio0_default: gpio0-default {
mux {
function = "gpio0";
groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
"gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
"gpio0_13_grp", "gpio0_14_grp";
};
conf {
groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
"gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
"gpio0_13_grp", "gpio0_14_grp";
slew-rate = <0>;
io-standard = <1>;
};
conf-pull-up {
pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
bias-pull-up;
};
conf-pull-none {
pins = "MIO7", "MIO8";
bias-disable;
};
};
pinctrl_i2c0_default: i2c0-default {
mux {
groups = "i2c0_10_grp";
function = "i2c0";
};
conf {
groups = "i2c0_10_grp";
bias-pull-up;
slew-rate = <0>;
io-standard = <1>;
};
};
pinctrl_i2c0_gpio: i2c0-gpio {
mux {
groups = "gpio0_50_grp", "gpio0_51_grp";
function = "gpio0";
};
conf {
groups = "gpio0_50_grp", "gpio0_51_grp";
slew-rate = <0>;
io-standard = <1>;
};
};
pinctrl_sdhci0_default: sdhci0-default {
mux {
groups = "sdio0_2_grp";
function = "sdio0";
};
conf {
groups = "sdio0_2_grp";
slew-rate = <0>;
io-standard = <1>;
bias-disable;
};
mux-cd {
groups = "gpio0_0_grp";
function = "sdio0_cd";
};
conf-cd {
groups = "gpio0_0_grp";
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
io-standard = <1>;
};
mux-wp {
groups = "gpio0_15_grp";
function = "sdio0_wp";
};
conf-wp {
groups = "gpio0_15_grp";
bias-high-impedance;
bias-pull-up;
slew-rate = <0>;
io-standard = <1>;
};
};
pinctrl_uart1_default: uart1-default {
mux {
groups = "uart1_10_grp";
function = "uart1";
};
conf {
groups = "uart1_10_grp";
slew-rate = <0>;
io-standard = <1>;
};
conf-rx {
pins = "MIO49";
bias-high-impedance;
};
conf-tx {
pins = "MIO48";
bias-disable;
};
};
pinctrl_usb0_default: usb0-default {
mux {
groups = "usb0_0_grp";
function = "usb0";
};
conf {
groups = "usb0_0_grp";
slew-rate = <0>;
io-standard = <1>;
};
conf-rx {
pins = "MIO29", "MIO31", "MIO36";
bias-high-impedance;
};
conf-tx {
pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
"MIO35", "MIO37", "MIO38", "MIO39";
bias-disable;
};
};
};
&qspi {
u-boot,dm-pre-reloc;
status = "okay";
is-dual = <0>;
num-cs = <1>;
flash@0 {
compatible = "n25q128a11";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <50000000>;
#address-cells = <1>;
#size-cells = <1>;
partition@qspi-fsbl-uboot {
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@qspi-linux {
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@qspi-device-tree {
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@qspi-rootfs {
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
partition@qspi-bitstream {
label = "qspi-bitstream";
reg = <0xC00000 0x400000>;
};
};
};
&sdhci0 {
u-boot,dm-pre-reloc;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdhci0_default>;
};
&uart1 {
u-boot,dm-pre-reloc;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_default>;
};
&usb0 {
status = "okay";
dr_mode = "host";
usb-phy = <&usb_phy0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb0_default>;
};
我应该如何去修改呢？修改何处呢?
