5265.DSP schemeic.pdf
8883.1.docx你好我司參考TMS320C6657 EVM自行設計了一片電路板
Jtag connect 後遇到以下問題
1.只有core 1有辦法connect,core 0設定connect時會跳出下圖Error-1143
Error connecting to the target: (Error -1143 @ 0x0) Device core was hung. The debugger has forced the device to a ready state and recovered debug control, but your application's state is now corrupt. You should have limited access to memory and registers, but you may need to reset the device to debug further.
2.core 1 connect後無法 load program。
請問會是我電路設計有那裡有錯誤造成這些error嗎?
詳細電路圖如附件
3. Power sequence 及 reset sequence也附上。
4. 另外請問一下,VCNTL0~3如果沒有去控制的話,會有問題嗎?
thx