使用beaglebone A3做GPMC配置时没有弄明白的问题，请指点！非常感谢！！

我想使用GPMC总线配置成GPIO的方式，给gpmc_a0--gpmc_a8写数据，模拟出FPGA的配置时序，用于对FPGA做CS配置

对GPMC的Config１－config7做了如下配置！

base = ioremap_nocache(SOC_GPMC_0_REGS,0x2000);
//__raw_writel(u32 l,unsigned long addr)
//_raw_readl(unsigned long addr)

//__raw_writel(HWREG(SOC_GPMC_0_REGS + GPMC_SYSCONFIG ) |= GPMC_SYSCONFIG_SOFTRESET,base + GPMC_SYSCONFIG)

//enable clock to GPMC module
//HWREG(SOC_PRCM_REGS + CM_PER_GPMC_CLKCTRL ) |= CM_PER_GPMC_CLKCTRL_MODULEMODE_ENABLE;

//check to see if enabled
//while((HWREG(SOC_PRCM_REGS + CM_PER_GPMC_CLKCTRL) & CM_PER_GPMC_CLKCTRL_IDLEST) != (CM_PER_GPMC_CLKCTRL_IDLEST_FUNC << CM_PER_GPMC_CLKCTRL_IDLEST_SHIFT));

//reset the GPMC module
//HWREG(SOC_GPMC_0_REGS + GPMC_SYSCONFIG ) |= GPMC_SYSCONFIG_SOFTRESET;
//while((HWREG(SOC_GPMC_0_REGS + GPMC_SYSSTATUS) & GPMC_SYSSTATUS_RESETDONE) == GPMC_SYSSTATUS_RESETDONE_RSTONGOING);

//Configure to no idle
//temp = HWREG(SOC_GPMC_0_REGS + GPMC_SYSCONFIG);
temp = __raw_readl(base + GPMC_SYSCONFIG);

temp &= ~GPMC_SYSCONFIG_IDLEMODE;

temp |= GPMC_SYSCONFIG_IDLEMODE_NOIDLE << GPMC_SYSCONFIG_IDLEMODE_SHIFT;

//HWREG(SOC_GPMC_0_REGS + GPMC_SYSCONFIG) = temp;
__raw_writel(temp,base + GPMC_SYSCONFIG);

//HWREG(SOC_GPMC_0_REGS + GPMC_IRQENABLE) = 0x0;
//HWREG(SOC_GPMC_0_REGS + GPMC_TIMEOUT_CONTROL) = 0x0;
__raw_writel(0x0,base + GPMC_IRQENABLE);
__raw_writel(0x0,base + GPMC_TIMEOUT_CONTROL);

//configure for NOR and granularity x2
// CONFIG 1 .. 16 bits multiplexed
__raw_writel((0x0|(GPMC_CONFIG1_0_DEVICESIZE_SIXTEENBITS << GPMC_CONFIG1_0_DEVICESIZE_SHIFT ) | \
 (GPMC_CONFIG1_0_ATTACHEDDEVICEPAGELENGTH_FOUR << GPMC_CONFIG1_0_ATTACHEDDEVICEPAGELENGTH_SHIFT ) | \
 (0x0 << 8 )), base + GPMC_CONFIG1(csNum));

// config 2 .. chip select assert/deassert times
__raw_writel((0x0|(0x05) |(0xb << GPMC_CONFIG2_0_CSRDOFFTIME_SHIFT) | \
 (0xa << GPMC_CONFIG2_0_CSWROFFTIME_SHIFT)),base + GPMC_CONFIG2(csNum));  

// config 3 .. latch enable assert and de-assert
__raw_writel(0x0 | \
 (0 << GPMC_CONFIG3_0_ADVONTIME_SHIFT) | \
 (2 << GPMC_CONFIG3_0_ADVRDOFFTIME_SHIFT) | \
 (2 << GPMC_CONFIG3_0_ADVWROFFTIME_SHIFT),base + GPMC_CONFIG3(csNum));

// config 4 .. output enable / read write enable assert and de-assert
__raw_writel((0x0 |
 (0x5 << GPMC_CONFIG4_0_OEONTIME_SHIFT) | \
 (0xb << GPMC_CONFIG4_0_OEOFFTIME_SHIFT) | \
 (0x6 << GPMC_CONFIG4_0_WEONTIME_SHIFT)| \
 (0x9 << GPMC_CONFIG4_0_WEOFFTIME_SHIFT)),base + GPMC_CONFIG4(csNum));

// Config 5 - read and write cycle time
__raw_writel((0x0 | \
 (0xb << GPMC_CONFIG5_0_RDCYCLETIME_SHIFT)| \
 (0xa << GPMC_CONFIG5_0_WRCYCLETIME_SHIFT)| \
 (0x9 << GPMC_CONFIG5_0_RDACCESSTIME_SHIFT)),base + GPMC_CONFIG5(csNum));

// Config 6 .. bus turnaround delay, etc
__raw_writel((0x0 | \
 (0 << GPMC_CONFIG6_0_CYCLE2CYCLESAMECSEN_SHIFT) | \
 (0 << GPMC_CONFIG6_0_CYCLE2CYCLEDELAY_SHIFT) | \
 (3 << GPMC_CONFIG6_0_WRDATAONADMUXBUS_SHIFT)| \
 (0 << GPMC_CONFIG6_0_WRACCESSTIME_SHIFT)),base + GPMC_CONFIG6(csNum));

// config 7 .. base address of the chip select and address space. (16 MB is smallest)
__raw_writel(( 0x09 << GPMC_CONFIG7_0_BASEADDRESS_SHIFT) | \
 (0x1 << GPMC_CONFIG7_0_CSVALID_SHIFT) |  \  //片选，置1
 (0x0f << GPMC_CONFIG7_0_MASKADDRESS_SHIFT), \ //
 base + GPMC_CONFIG7(csNum));

按照资料上面介绍的方式，如果以上配置没有问题的话（不确定）
我就可以通过Config7配置的基地址去做单个的引脚数据读写了！
现在的问题请高手帮忙指点：

0、不知道这样用可不可以配置出来，也就是说可能我这样应用，或者对GPMC使用的理解就是错误的！

1、不知道怎么在CONFIG７上面映射出我想要的gpmc_a0-gpmc_a8
2、不知道具体怎么去写在CONFIG7里面的我想要的具体的IO口！