This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM5718的ehrpwm的周期中断

Other Parts Discussed in Thread: AM5718, TPD12S015

TI工程师您好!

      在使用AM5718做ehrmpwm的内核驱动里面的中断时,设置了周期中断可以用request_irq申请到ehrpwm2对应的209号中断,执行

echo 1 > /sys/class/pwm/pwmchip2/export
echo 1000000 >/sys/class/pwm/pwmchip2/pwm1/period

echo 1 >/sys/class/pwm/pwmchip2/pwm1/enable

也可以运行,在驱动里面读出中断标志寄存器打印也产生了中断标志,但没有进入注册的中断函数,看手册里面这样写

Software Generated Interrupts (SGIs): SGIs are generated by writing to the Cortex-A15 Software
Generated Interrupt Register (GICD_SGIR). A maximum of 16 SGIs (ID0–ID15) can be generated for
the CPU interface. An SGI has edge-triggered properties. The software triggering of the interrupt is
equivalent to the edge transition of the interrupt signal on a peripheral input.
• Private Peripheral Interrupts (PPIs): A PPI is an interrupt generated by a peripheral that is specific to
the processor. Although interrupts ID16–ID31 are dedicated to PPIs in general, only seven PPIs are
actually used for the CPU interface (ID25–ID31). Interrupts ID16–ID24 are reserved (not used).
• Shared Peripheral Interrupts (SPIs): SPIs are triggered by events generated on associated interrupt
input lines. In this device, the GIC is configured to support 160 SPIs corresponding to its external
IRQS[159:0] signals. SPIs start at ID32 and their mapping is presented in Section 17.3.1.
For detailed information about this module and description of SGIs and PPIs, see the ARM Cortex-A15
MPCore Technical Reference Manual (available at infocenter.arm.com/help/index.jsp).
是否是AM5718只支持160个中断,而现在申请到的中断号是209,是否不支持,请解答,谢谢!

  • 是的,AM5718 MPU只支持160个硬件中断,请参考TRM手册17.1 Interrupt Controllers Overview。
    Cortex®-A15 MPU Subsystem Interrupt Controller (MPU_INTC)
    The MPU_INTC module (also called Generalized Interrupt Controller [GIC]) is a single functional unit that
    is integrated in the Arm® Cortex-A15 multiprocessor core (MPCore) alongside Cortex-A15 processor. It
    provides:
    • 160 hardware interrupt inputs

    www.ti.com/.../spruhz7i.pdf
  • 那么给出这个160个中断号后面的中断号具体怎么用?该如何使用?执行cat /proc/interrupts后打印出来的160以后的中断号又是如何使用的?谢谢!
    169: 0 CBAR 28 Level 4805b000.gpio
    202: 0 CBAR 29 Level 4805d000.gpio
    212: 0 4805d000.gpio 9 Edge Enter
    230: 0 4805d000.gpio 27 Edge 4809c000.mmc cd
    235: 0 CBAR 30 Level 48051000.gpio
    248: 0 48051000.gpio 12 Edge tpd12s015 hpd
    268: 0 CBAR 116 Level 48053000.gpio
    303: 1038 CBAR 69 Level 48020000.serial
    306: 30 CBAR 251 Level mbox_ipu1_ipc3x, mbox_dsp1_ipc3x
    310: 36 CBAR 255 Level mbox_ipu2_ipc3x
    314: 0 CBAR 35 Level rproc-wdt
    317: 0 CBAR 38 Level rproc-wdt
    318: 0 CBAR 39 Level rproc-wdt
    319: 0 CBAR 40 Level rproc-wdt
    320: 0 CBAR 41 Level rproc-wdt
    328: 8 CBAR 108 Level omap_dmm_irq_handler
    329: 936 CBAR 51 Level 48070000.i2c
    330: 89 CBAR 56 Level 48060000.i2c
    331: 200 CBAR 55 Level 4807c000.i2c
    332: 13534 CBAR 78 Level mmc0
    333: 789 CBAR 81 Level mmc1
    334: 13 CBAR 89 Level mmc2
    335: 0 CBAR 23 Level 40d01000.mmu
    336: 0 CBAR 145 Level 40d02000.mmu
    337: 0 CBAR 395 Level 58882000.mmu
    338: 0 CBAR 396 Level 55082000.mmu
    341: 0 CBAR 49 Level ahci[4a140000.sata]
    342: 4 CBAR 72 Edge dwc3-omap
    343: 5 CBAR 87 Edge dwc3-omap
    344: 0 CBAR 15 Level gpmc
    345: 0 CBAR 153 Level 4846c000.mcasp_tx
    346: 0 CBAR 152 Level 4846c000.mcasp_rx
    348: 0 CBAR 335 Level 48484000.ethernet
    349: 0 CBAR 336 Level 48484000.ethernet
    352: 8 CBAR 16 Level SGX ISR
    357: 0 CBAR 46 Level 4b101000.sham
    358: 0 CBAR 47 Level 48090000.rng
    359: 0 CBAR 354 Level vpe
    360: 0 CBAR 351 Level vip1-s0
    361: 0 CBAR 392 Level vip1-s1
    362: 221 CBAR 53 Level omap_hdq
    363: 0 CBAR 119 Level cal
    365: 0 CBAR 20 Level OMAP DISPC
    366: 0 CBAR 96 Level OMAP HDMI
  • 同时,参考手册上也说明EHRPWM2的中断是209,那么这个中断号应该是可用的,是否和只支持160个中断矛盾?
  • EHRPWM2中断事件号是209,可以通过Interrupt Controller Crossbar映射到MPU_INTC的160个硬件中断。