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Original question:

TMS320C6678: 【TMDXEVM667LE】GE例程

TMS320C6678: 【TMDXEVM667LE】GE DSP-PC link up/down跳变

Zahir Wang
Prodigy 175 points
Part Number: TMS320C6678


您好 我在DSP-PC通信的测试中 将mode改为ETHERNET_AUTO_NEGOTIAT_SLAVE后 debug出下面信息 

PHY1 link up. TSCL= 0x4ca7a366
PHY1 link down. TSCL= 0x4caf2502
PHY1 link down. TSCL= 0x4e425de3
PHY1 link down. TSCL= 0x4e821a7b
PHY1 link down. TSCL= 0x4e987966
PHY1 link down. TSCL= 0x5064268c
PHY1 link down. TSCL= 0x50a19068
PHY1 link down. TSCL= 0x537e53a6
PHY1 link down. TSCL= 0x538e735a
PHY1 link down. TSCL= 0x53925894
PHY1 link up. TSCL= 0x53bc054b
PHY1 link up. TSCL= 0x53ded48e
PHY1 link down. TSCL= 0x5560771b
PHY1 link down. TSCL= 0x58d3a5d9
PHY1 link down. TSCL= 0x5907a4c1
PHY1 link up. TSCL= 0x591ff68d

if(gpMDIO_regs->LINK_REG&(1<<uiPhy_NUM))
printf("PHY%d link up. TSCL= 0x%x\n", uiPhy_NUM, TSCL);
else
printf("PHY%d link down. TSCL= 0x%x\n", uiPhy_NUM, TSCL);

LINK_REG：

MDIO Link state. This register is updated after a read of the Generic Status Register of a PHY. The bit is set if the PHY with the
corresponding address has link and the PHY acknowledges the read transaction. The bit is reset if the PHY indicates it does not have
link or fails to acknowledge the read transaction. Writes to the register have no effect.
In addition, the status of the two PHYs specified in the MDIOUSERPHYSEL registers can be determined using the MLINK input pins.
This is determined by the LINKSEL bit in the MDIOUSERPHYSEL register.
0 = The PHY indicates that it does not have a link or fails to acknowledge the read transaction
1 = The PHY with the corresponding address has a link and the PHY acknowledges the read transaction

请问出现这种link up/down跳变的情况是由于硬件上网口没连好或者连接不稳定吗还是其他原因

  • 0
    TI__Guru**** 357097 points

    ETHERNET_AUTO_NEGOTIAT_SLAVE使用在External FIFO loopback test测试模式下的，不是DSP和PC之间的。请看KeyStone_1_GE_STK_User's_Guide.doc文档里的2.4 External FIFO loopback test。

  • 0 回复 Shine
    Prodigy 175 points

    将mode改为ETHERNET_AUTO_NEGOTIAT_MASTER后依旧会出现这些link uo/down的情况

  • 0 回复 Zahir Wang
    TI__Guru**** 357097 points

    ETHERNET_AUTO_NEGOTIAT_SLAVE,ETHERNET_AUTO_NEGOTIAT_MASTER模式是在两块dsp板子之间的loopback，不是和PC之间。请看一下上面的doc文档说明。

  • 0 回复 Shine
    Prodigy 175 points

    在这个doc文档中看到，如果没有两个DSP可以用PC代替，所以我以为DSP和PC之间也是按照两个DSP通信之间的设置来，设置为DSP0-DSP1和AUTO_NEGOTIAT。

    那么在DSP与PC进行通信的时候，我想问下test_data_path和ethernet_mode应该怎么设置？

    我进行了如下尝试

    1.将test_data_path设置为DSP-DSP ethernet_mode设置为1000M_Fullduplex

    dsp debug信息显示数据已发送 也没有存在link up/down跳变的情况 但是在抓包工具上看不到这些包

    2.将test_data_path设置为DSP-DSP ethernet_mode设置为auto_slave 但是PC端并不连接上网线

    会不停地debug出PHY1 link up. TSCL=....

    3.将test_data_path设置为Serdes ethernet_mode设置为1000M 同时也disable loop

    debug信息是waiting for GE RX timeout 同时在抓包工具上看不到发送的数据包

    4.将test_data_path设置为DSP-DSP ethernet_mode设置为auto_slave 注释掉link_INT0_PHY_select=MDIO_INT_SELECT_PHY以及clock_div这三行

    发现不会debug link up/down信息 在抓包工具上可以看到发送的数据包

    我还有一个疑问是怎么理解link up和link down？出现这种情况可能是什么原因造成的？

    Zahir Wang 说：
    0 = The PHY indicates that it does not have a link or fails to acknowledge the read transaction
    1 = The PHY with the corresponding address has a link and the PHY acknowledges the read transaction
  • 0 回复 Zahir Wang
    TI__Guru**** 357097 points

    如果没有两个DSP可以用PC代替这个是针对2.5 DSP 0 to DSP 1 test。

  • 0 回复 Shine
    Prodigy 175 points

    doc上关于dsp-dsp的测试是这样说的 我也是这样改的

    If there are no two DSPs to do this test, a PC can be used instead of DSP 1. In this case, an Ethernet cable is used to connect DSP board and PC. On the PC, an Ethernet packet capturing tool should be used to receive and verify the packets from DSP 0. Please note, in this case, DSP 0 may receive many broadcasting packets from PC.

    To enable external two DSP test, test operator need to configure test mode in the code:

    GE_Test_Data_Path test_data_path= GE_TEST_DSP0_TO_DSP1

    我尝试将PATH改为DSP-DSP  并测试了把ethernet_mode改为不同的模式后的测试结果 测试结果分别如下1.2.3所示

    Zahir Wang 说：

    1.将test_data_path设置为DSP-DSP ethernet_mode设置为1000M_Fullduplex

    dsp debug信息显示数据已发送 也没有存在link up/down跳变的情况 但是在抓包工具上看不到这些包

    2.将test_data_path设置为DSP-DSP ethernet_mode设置为auto_slave 但是PC端并不连接上网线

    会不停地debug出PHY1 link up. TSCL=....

    3.将test_data_path设置为DSP-DSP ethernet_mode设置为auto_master

    PC端可以抓到包 但是dsp这边会不停地debug出PHY1 link up/down.

    请问link up/down这些是什么情况？

    或者说是我程序修改的不对吗？您能指点的更详细一些吗？

  • 0 回复 Zahir Wang
    TI__Guru**** 357097 points

    抱歉，写STK的工程师已经离职，所以我们对STK的技术支持有限。

    我查了一下论坛，DSP-PC测试的话，设置ETHERNET_AUTO_NEGOTIAT_SLAVE，所以您一开始用的模式是对的，请忽略我之前的回复。

    请看下面帖子。
    需要修改GE_Test.c:

    GE_Test_Data_Path test_data_path= GE_TEST_DSP0_TO_DSP1;

    Ethernet_Mode ethernet_mode = ETHERNET_AUTO_NEGOTIAT_SLAVE;

    https://e2echina.ti.com/support/processors/f/processors-forum/64320/c6678-phy-88e1112/147545#147545

    link up/down跳变的情况可能是网口不稳，换一台电脑试试。