GPMC的CS0,CS1的这些首地址在什么地方可查到
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CS0首地址从0x0000 0000开始,每个cs空间大小是可以配置的,所以后面CSx的首地址要根据每个空间大小来决定。
请查看TRM 2.2 L3_MAIN Memory Map
GPMC space:
Eight independent GPMC chip selects (CS0 to CS7) are available in the first quarter (Q0) of the addressing space to access NOR/NAND flash and SRAM. The chip selects have a programmable start address and programmable size (up to 128MiB) in a total memory space of (Q0) 1GiB, but limited now to 512MiB.
Table 2-1. L3_MAIN Memory Map
https://www.ti.com/lit/ug/spruhz7j/spruhz7j.pdf