我们使用了TDA2x芯片作为Soc，phy使用的是DP83TC811。phy_mode是RGMII。
在ping对端IP的时候，当前状况是TX_CLK 没有时钟波形 TX_D[3:0]没有波形，但RX_CLK是有时钟波形的。
TDA2x 的寄存器0x4A003650 值: 0x00040100
请问， 是dts中配置问题？还是其他部分影响？
下面是相关log，以及dts内容。
libphy: Fixed MDIO Bus: probed
davinci_mdio 48485000.mdio: davinci mdio revision 1.6, bus freq 1000000
davinci_mdio 48485000.mdio: detected phy mask fffffffe
libphy: 48485000.mdio: probed
davinci_mdio 48485000.mdio: phy[0]: device 48485000.mdio:00, driver TI DP83TC811
cpsw 48484000.ethernet: Detected MACID = 7c:01:0a:e1:46:4
cpsw 48484000.ethernet: initialized cpsw ale version 1.4
cpsw 48484000.ethernet: ALE Table size 1024
cpsw 48484000.ethernet: cpts: overflow check period 500 (jiffies)
cpsw 48484000.ethernet: cpsw: Random MACID = 62:4d:11:4c:dc:0f
net eth0: initializing cpsw version 1.15 (0)
TI DP83TC811 48485000.mdio:00: attached PHY driver [TI DP83TC811] (mii_bus:phy_addr=48485000.mdio:00, irq=POLL)
Started Network Time Synchronization.
8021q: adding VLAN 0 to HW filter on device eth0
cpsw 48484000.ethernet eth0: Link is Up - 10Mbps/Half - flow control off
dra7.dtsi 中：
mac: ethernet@48484000 {
compatible = "ti,dra7-cpsw","ti,cpsw";
ti,hwmods = "gmac";
clocks = <&gmac_main_clk>, <&l3init_clkctrl DRA7_GMAC_CLKCTRL 25>;
clock-names = "fck", "cpts";
cpdma_channels = <8>;
ale_entries = <1024>;
bd_ram_size = <0x2000>;
mac_control = <0x20>;
slaves = <2>;
active_slave = <0>;
cpts_clock_mult = <0x784CFE14>;
cpts_clock_shift = <29>;
reg = <0x48484000 0x1000
0x48485200 0x2E00>;
#address-cells = <1>;
#size-cells = <1>;
/*
* Do not allow gating of cpsw clock as workaround
* for errata i877. Keeping internal clock disabled
* causes the device switching characteristics
* to degrade over time and eventually fail to meet
* the data manual delay time/skew specs.
*/
ti,no-idle;
/*
* rx_thresh_pend
* rx_pend
* tx_pend
* misc_pend
*/
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
ranges;
syscon = <&scm_conf>;
status = "disabled";
davinci_mdio: mdio@48485000 {
compatible = "ti,cpsw-mdio","ti,davinci_mdio";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "davinci_mdio";
bus_freq = <1000000>;
reg = <0x48485000 0x100>;
};
cpsw_emac0: slave@48480200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
phy_sel: cpsw-phy-sel@4a002554 {
compatible = "ti,dra7xx-cpsw-phy-sel";
reg= <0x4a002554 0x4>;
reg-names = "gmii-sel";
};
};
dra7-evm.dts 中：
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "rgmii";
dual_emac_res_vlan = <1>;
};
