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文档中提供的超级链接 • C6678 EVM SPI boot example 已经过期 能否提供最新的链接找到 这个源码谢谢?
2 Direct Boot Examples (without IBL)
The TI C66xx EVMs always implement an Intermediate bootloader after power on reset. The FPGA firmware on the EVM redirects the core to the IBL flashed on the EEPROM and then directs it to the desired boot mode. However, in custom designs, it has been observed that adding an additional EEPROM for implementing the IBL may not be practical due to cost and size reasons. The C667x PG 2.0 silicon has the PLL lock up issue fixed and no longer requires an implementation of an IBL on custom boards; the C665x PG 1.0 silicon does not have the PLL lock up issue, so it also does not require an implementation of an IBL on custom boards. In order to demonstrate that the hardware can be booted directly from the ROM bootloader without the IBL, some examples were created that can be used to validate this flow on the EVM hardware. The two examples described below are for SPI boot on C6678 and NAND boot on C6657. Each of the examples have a ReadMe.txt or document that walks users through the processing of creating these boot images.
• C6678 EVM SPI boot example
• C6657 EVM SPI boot example with DDR initialization
• C6657 EVM NAND boot example
我所有的配置都按照官方的的配置,适应我们自己的板卡,现在是抓到的时序图看,DSP上电后,flash对应的片选拉低,时钟正常,读指令0x03和flash的读指令一致,读地址是0x00,但是flash0地址没有回复。任何数据
0x1087fffc地址是函数入口地址 0x0080000
各个段的数据也对上了,没有串口打印,挂仿真器,连0核,pc指向0xEB69B13C感觉跑飞到哪里去了
我只做了0核boot没有搞多核
KeyStone Architecture DSP Bootloader 手册中的3.9.2章
3.9.2 RBL Loading Process Similar to the PCIe boot mode, the RBL has no role in transferring the boot image into the device. The host is responsible to load the code in the appropriate memory location and also populate the boot magic address with the c_int00 address. The host must also interrupt CorePac0 and bring it out of IDLE.
文档中说
主机还必须中断CorePac0并使其脱离空闲状态。
我现在的项目是 bootmagicaddr正确 各段数据也拷贝正确 ,但是核0无法唤醒 ;按照文档的意思是需要主机去唤醒核0;那么怎么唤醒核0呢?
pc指向0xEB69B13C
指针指向的地址比较奇怪,查不到该地址的位置,但不是指向RBL(20B00000)中,应该已经进入了用户代码。
请问是用仿真器跟PC直接指向了0xEB69B13C吗?debug窗口能看到pc跳转信息吗?
主机还必须中断CorePac0并使其脱离空闲状态
你是SPI启动,请查看SPI章节,不需要唤醒。
问题已解决,谢谢官方的技术支持。
总结一下:
1.刚开始一直查spi总线的问题,发先6678的spi总线时序图和传统的有区别,通过时序分析发现,
传统模式1.1和6678模式1.0的时序基本一致。
2.修改了时序,上电还是重复读0地址,修改boot parameter table 为小端模式,数据有序读取到l2内存
3.0x1087fffc地址,无法获取函数入口地址,各段存放数据也有问题,通过修改cmd配置,获取正确的数据和入口地址。
4.发现准备好数据后,0核还是跳转不过去,而且挂仿真器,pc跑道DDR内无效地址处,这是什么原因。是需要硬件复位吗,还是其他寄存器标志操作。回到第2点,官方手册提到,RBL只支持大端模式,于是,bootloader的bin转化大端,再添加小端的boot parameter table生成的.bin烧写到flash.串口有打印,成功引导。