RT,请各位专家给我帮助,谢谢。
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VPIF需要接收特定格式的数据,而FPGA给出的是编码完了的bitstream,不match。
你是之前问VLYNQ与Altera FPGA适配的那位吗?
你的总体系统框图是什么?编码不用DSP做,用FPGA做,那DSP拿编码后数据做什么用?