HI ,
如题,请提供下TDA4VM-Q1内部pin dealy数据,用于LPDDR4 layout走线等长,谢谢!
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您好!
除了;PDDR4外,其他pin脚的pin delay也请提供下~比如SGMII也要绕等长走线
其它的pin脚没有提供相应的数据,因为与整体信号速率相比,延迟很小。
HI ,Nancy
之前提供的LPDDR4 的pin delay数据单位是ps的,我们按照1ps=5mil来换算,发现LPDDR4等长仿真差异巨大,怀疑是该换算关系不正确。
能否提供下以单位mil的pin delay数据,或者提供下TDA4内部ps和mil之间的换算关系;
请参考英文论坛的回复,不提供以mil为单位的数据。
Pin delay cannot be provided in length (mils), as the delay is more than just trace length. It may include other constructions like vias. All Jacinto LPDDR4 requirements are also provided in time (ps).
HI ,Nancy
那请提供下TDA4内部ps和mil之间的换算关系,是1ps=?mil呢?