AM5708片上L2 RAM的大小是288K，请看一下数据手册上的说明。
A 288-KiB (program and data) L2 memory, only part of which is cacheable:
• When configured as a cache, the L2 memory is a 4-way set associative cache with a 128-byte cache line
• Only 256 KiB of L2 memory can be configured as cache or SRAM
• 32 KiB of the L2 memory is always mapped as SRAM
• The L2 memory controller has an Error Correction Code (ECC) and ED mechanism, including necessary SRAM
• The L2 memory controller supports hardware prefetching and also provides bandwidth management, memory protection, and power-down functions.
• Page size for L2 memory is 16KB
AM570x Sitara
处理器 datasheet (Rev. F) (ti.com.cn)
