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Original question:
TDA3XEVM: 如何查看DSP1的实际工作主频
请看下面的帖子是否有帮助？https://e2e.ti.com/e2eprivate/ficosa/ficosa-sv_community/f/ficosa-sv-tda-support/1151428/utils_dmacopy1d-api-usage/4327305https://e2e.ti.com/support/processors-group/processors/f/processors-forum/688528/tda2-why-utils_dmacopy1d-work-not-ok
您好，第一个链接已经失效了，第二个链接并没有具体说如何配置啊？
请问具体是数据没搬移还是搬错了？cache有使能么？
数据没有搬运，怎样将cache使能啊？
请问使用哪个版本的SDK?
PROCESSOR_SDK_RADAR_03_08_00_00
我把您的问题升级到英文e2e论坛了，请关注下面帖子的回复。https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1164728/tda3xevm-how-to-configure-dma-to-move-data-from-local-l2-to-ddr
您好，还是没有回复啊
不好意思，已经去催了。
抱歉回复晚了，下面是e2e工程师的回复。
What is srcAddr and which EDMA instance is used?
Was the cache operation done before and after EDMA transfer?
srcAddr 是0x00800150，也就是DSP1的LOCAL_L2地址，EDMA 实例是Utils_dmaCopy1D()。
搬移之前执行了
Cache_wb((Ptr) (0x00800150), 256*8*128, Cache_Type_L2D, TRUE);
搬移之后执行了
Cache_wb((Ptr) (0x90000000), 256*8*128, Cache_Type_ALLD, TRUE);
不清楚这个Cache_Type是否设置正确。
已把您的问题在e2e帖子里更新，请关注帖子的回复。
请看下面工程师的最新回复。
There are 2 EDMA instances, one is SYSTEM EDMA and the other is DSP EDMA.
Depending on which instance, the DSP L2 address is different.
The one used in the code is for DSP EDMA.
The srcAddr should be 128-bytes aligned because cache line size is 128-bytes. The srcAddr should be changed to 0x00800180.
And the call should be WB L1D cache.
Cache_wb((Ptr) (0x00800180), 256*8*128, Cache_Type_L1D, TRUE);
After EDMA transfer, the call should be Invalidate.
Cache_inv((Ptr) (0x90000000), 256*8*128, Cache_Type_ALLD, TRUE);
