Tong Tang
你好。请教你有关6747MCASP接口配置问题，照说这种低级问题不应该麻烦你的，但是俺确实没招了。
所以才向你请教，以前没有做过涉及到音频处理的项目，所以对这个接口比较陌生。具体情况就是DSP6747的
MCASP0.AXR0[3]发不出数据。程序卡在while ( ! ( MCASP0_SRCTL3 & 0x10 ) );
时钟信号，帧同步信号，已经送给DSP了
软件环境：CCS3.3 仿真器是合达众的560plus 片子型号：6747
MCASP管脚配置
PINMUX9 = 0x11111100; // McASP0
PINMUX10 = 0x00111110; // McASP0
void C6747_MCASP_open()
{
// Configure AIC3168
Int16 msec, sec;
Int16 sample;
C6747_I2C_write( AIC3168_I2C_ADDR, AIC3168DA_RESET1, 6 );
C6747_I2C_write( AIC3168_I2C_ADDR, AIC3168DA_RESET2, 6 );
C6747_I2C_write( AIC3168_I2C_ADDR, AIC3168AD_RESET1, 7 );
C6747_I2C_write( AIC3168_I2C_ADDR, AIC3168AD_RESET2, 7 );
/*
以上是PCM3168A codec的设置，具体情况如下：
1、3168A为主设备（接收与发送），6747为从设备（接收与发送）
2、mcasp收发信号格式为 24-bit left-justified mode TDM format
3、3168A初始化后，工作正常，显示波能看出时钟信号（收发），帧同步信号（收发），以及数据（发送）
*/
// Initialize MCASP0
mcasp = &MCASP_MODULE_0;
mcasp->regs->GBLCTL = 0; // Reset
mcasp->regs->RGBLCTL = 0; // Reset RX
mcasp->regs->XGBLCTL = 0; // Reset TX
mcasp->regs->PWRDEMU = 1; // Free-running
// RX
mcasp->regs->RMASK = 0xffffffff; // No padding used
mcasp->regs->RFMT = 0x000280B8; // MSB 24bit, 2-delay, no pad, CFGBus DMA recevice
mcasp->regs->AFSRCTL = 0x00000310; // 6 TDM, Rising, Externally FS, word
mcasp->regs->ACLKRCTL = 0x00000080; // Rising , External CLK
mcasp->regs->AHCLKRCTL = 0x00000000; // INT CLK (from tx side)
mcasp->regs->RTDM = 0x00000006; // Slots 110
mcasp->regs->RINTCTL = 0x00000000; // Not used
mcasp->regs->RCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
// TX
mcasp->regs->XMASK = 0xffffffff; // No padding used
mcasp->regs->XFMT = 0x000280B8; // MSB 24bit, 2-delay, no pad, CFGBus DMA sent
mcasp->regs->AFSXCTL = 0x00000310; // 6 TDM, Rising edge INTERNAL FS, word
mcasp->regs->ACLKXCTL = 0x00000040; // Rising ,External CLK ,Separate clock and frame sync used by transmitand receive sections
mcasp->regs->AHCLKXCTL = 0x00000000; // EXT CLK
mcasp->regs->XTDM = 0x00000006; // Slots 110
mcasp->regs->XINTCTL = 0x00000000; // Not used
mcasp->regs->XCLKCHK = 0x00FF0008; // 255-MAX 0-MIN, div-by-256
mcasp->regs->SRCTL3 = 0x000D; // MCASP0.AXR0[3] --> DIN
mcasp->regs->SRCTL4 = 0x000D; // MCASP0.AXR0[4] --> DIN
mcasp->regs->SRCTL0 = 0x000E; // MCASP0.AXR0[0] <-- DOUT
mcasp->regs->SRCTL1 = 0x000E; // MCASP0.AXR0[1] <-- DOUT
mcasp->regs->SRCTL2 = 0x000E; // MCASP0.AXR0[2] <-- DOUT
mcasp->regs->PFUNC = 0x00000000; // All MCASPs Pin functions as McASP pin
mcasp->regs->PDIR = 0x00000018; // All inputs except AXR0[4], AXR0[3]
mcasp->regs->DITCTL = 0x00000000; // TDM mode
mcasp->regs->DLBCTL = 0x00000000; // Loopback mode is disabled.
mcasp->regs->AMUTE = 0x00000000; // AMUTE mode is disabled
// Starting sections of the McASP
mcasp->regs->XGBLCTL |= GBLCTL_XHCLKRST_ON; // HS Clk
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XHCLKRST_ON ) != GBLCTL_XHCLKRST_ON );
mcasp->regs->RGBLCTL |= GBLCTL_RHCLKRST_ON; // HS Clk
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RHCLKRST_ON ) != GBLCTL_RHCLKRST_ON );
mcasp->regs->XGBLCTL |= GBLCTL_XCLKRST_ON; // Clk
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XCLKRST_ON ) != GBLCTL_XCLKRST_ON );
mcasp->regs->RGBLCTL |= GBLCTL_RCLKRST_ON; // Clk
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RCLKRST_ON ) != GBLCTL_RCLKRST_ON );
mcasp->regs->XSTAT = 0x0000ffff; // Clear all
mcasp->regs->RSTAT = 0x0000ffff; // Clear all
mcasp->regs->XGBLCTL |= GBLCTL_XSRCLR_ON; // Serialize
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSRCLR_ON ) != GBLCTL_XSRCLR_ON );
mcasp->regs->RGBLCTL |= GBLCTL_RSRCLR_ON; // Serialize
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSRCLR_ON ) != GBLCTL_RSRCLR_ON );
// Write a 0, so that no underrun occurs after releasing the state machine
mcasp->regs->RBUF0 = 0;
mcasp->regs->RBUF1 = 0;
mcasp->regs->RBUF2 = 0;
mcasp->regs->XBUF3 = 0;
mcasp->regs->XBUF4 = 0;
mcasp->regs->XGBLCTL |= GBLCTL_XSMRST_ON; // State Machine
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XSMRST_ON ) != GBLCTL_XSMRST_ON );
mcasp->regs->RGBLCTL |= GBLCTL_RSMRST_ON; // State Machine
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RSMRST_ON ) != GBLCTL_RSMRST_ON );
mcasp->regs->XGBLCTL |= GBLCTL_XFRST_ON; // Frame Sync
while ( ( mcasp->regs->XGBLCTL & GBLCTL_XFRST_ON ) != GBLCTL_XFRST_ON );
mcasp->regs->RGBLCTL |= GBLCTL_RFRST_ON; // Frame Sync
while ( ( mcasp->regs->RGBLCTL & GBLCTL_RFRST_ON ) != GBLCTL_RFRST_ON );
/* Start by sending a dummy write */
while( ! ( MCASP0_SRCTL3 & 0x10 ) ); // Check for Tx ready
MCASP0_XBUF3_32BIT = 0;
/* Play Tone */
for ( sec = 0 ; sec < 5 ; sec++ )
{
for ( msec = 0 ; msec < 1000 ; msec++ )
{
for ( sample = 0 ; sample < 48 ; sample++ )
{
while ( ! ( MCASP0_SRCTL3 & 0x10 ) );
//程序卡在这里了，数据发不出来。寄存器XSTAT=0X171
//Causes a transmit interrupt (XINT),
//if this bit is set and XUNDRN in XINTCTL is set
//但是初始化的时候没开中断，mcasp->regs->XINTCTL = 0x00000000; // Not used
MCASP0_XBUF3_32BIT = (sinetable[sample] << 15);
while ( ! ( MCASP0_SRCTL3 & 0x10 ) );
MCASP0_XBUF3_32BIT = (sinetable[sample] << 15);
}
}
}
}
具体电路连接如下：
