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6678核间中断问题

#define IPCGR0  0x02620240

#define IPCGR1 0x02620244

*(unsigned int *)IPCGR1  =  0x1<<4;

*(unsigned int *)IPCGR1  |=  0x1;

中断没有产生,然后调试环境下查看寄存器映射的内存,执行完上述语句后,IPCGR1值未改变。

而且我手动写相应内存(如0x026200240地址)的值,也不能修改。

请问这是什么问题?

还有核间中断应该不需要配置片级中断控制器吧?

我只配置了核级中断控制器和cpu控制寄存器(csr、ier、istp等)。