Hi
6678的SRIO连接到K7,DSP端用的论坛提供的keystone_SRIO例程修改,DSP为主设备,FPGA为从设备,现在已经可以实现DSP到FPGA的SWRITE操作,但在进行NREAD测试时,打印出来的completion code = 1,也就是接收需要回应包的传输时超时,但在FPGA端通过Chipscope观察,FPGA收到了DSP的NREAD命令,也回送了回应包和数据。为什么DSP会超时呢?求解,谢谢了!
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