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我现在用的是linux系统,uboot版本是04.06.00.03,我现在外面挂载了两片DDR3,型号是H5TQ4G83AFR
uboot的配置如下:
static void config_am335x_ddr(void)
{
int data_macro_0 = 0;
int data_macro_1 = 1;
/* Enable the EMIF_FW Functional clock */
__raw_writel(PRCM_MOD_EN, CM_PER_EMIF_FW_CLKCTRL);
/* Enable EMIF0 Clock */
__raw_writel(PRCM_MOD_EN, CM_PER_EMIF_CLKCTRL);
/* Poll for emif_gclk & L3_G clock are active */
while ((__raw_readl(CM_PER_L3_CLKSTCTRL) & (PRCM_EMIF_CLK_ACTIVITY |
PRCM_L3_GCLK_ACTIVITY)) != (PRCM_EMIF_CLK_ACTIVITY |
PRCM_L3_GCLK_ACTIVITY));
/* Poll if module is functional */
while ((__raw_readl(CM_PER_EMIF_CLKCTRL)) != PRCM_MOD_EN);
__raw_writel(__raw_readl(VTP0_CTRL_REG) | VTP_CTRL_ENABLE,
VTP0_CTRL_REG);
__raw_writel(__raw_readl(VTP0_CTRL_REG) & (~VTP_CTRL_START_EN),
VTP0_CTRL_REG);
__raw_writel(__raw_readl(VTP0_CTRL_REG) | VTP_CTRL_START_EN,
VTP0_CTRL_REG);
/* Poll for READY */
while ((__raw_readl(VTP0_CTRL_REG) & VTP_CTRL_READY) != VTP_CTRL_READY);
__raw_writel(DDR2_RATIO, CMD0_CTRL_SLAVE_RATIO_0);
__raw_writel(CMD_FORCE, CMD0_CTRL_SLAVE_FORCE_0);
__raw_writel(CMD_DELAY, CMD0_CTRL_SLAVE_DELAY_0);
__raw_writel(DDR2_DLL_LOCK_DIFF, CMD0_DLL_LOCK_DIFF_0);
__raw_writel(DDR2_INVERT_CLKOUT, CMD0_INVERT_CLKOUT_0);
__raw_writel(DDR2_RATIO, CMD1_CTRL_SLAVE_RATIO_0);
__raw_writel(CMD_FORCE, CMD1_CTRL_SLAVE_FORCE_0);
__raw_writel(CMD_DELAY, CMD1_CTRL_SLAVE_DELAY_0);
__raw_writel(DDR2_DLL_LOCK_DIFF, CMD1_DLL_LOCK_DIFF_0);
__raw_writel(DDR2_INVERT_CLKOUT, CMD1_INVERT_CLKOUT_0);
__raw_writel(DDR2_RATIO, CMD2_CTRL_SLAVE_RATIO_0);
__raw_writel(CMD_FORCE, CMD2_CTRL_SLAVE_FORCE_0);
__raw_writel(CMD_DELAY, CMD2_CTRL_SLAVE_DELAY_0);
__raw_writel(DDR2_DLL_LOCK_DIFF, CMD2_DLL_LOCK_DIFF_0);
__raw_writel(DDR2_INVERT_CLKOUT, CMD2_INVERT_CLKOUT_0);
Data_Macro_Config(data_macro_0);
Data_Macro_Config(data_macro_1);
__raw_writel(PHY_RANK0_DELAY, DATA0_RANK0_DELAYS_0);
__raw_writel(PHY_RANK0_DELAY, DATA1_RANK0_DELAYS_0);
__raw_writel(DDR_IOCTRL_VALUE, DDR_CMD0_IOCTRL);
__raw_writel(DDR_IOCTRL_VALUE, DDR_CMD1_IOCTRL);
__raw_writel(DDR_IOCTRL_VALUE, DDR_CMD2_IOCTRL);
__raw_writel(DDR_IOCTRL_VALUE, DDR_DATA0_IOCTRL);
__raw_writel(DDR_IOCTRL_VALUE, DDR_DATA1_IOCTRL);
__raw_writel(__raw_readl(DDR_IO_CTRL) & 0xefffffff, DDR_IO_CTRL);
__raw_writel(__raw_readl(DDR_CKE_CTRL) | 0x00000001, DDR_CKE_CTRL);
__raw_writel(DDR3_EMIF_READ_LATENCY, EMIF4_0_DDR_PHY_CTRL_1);
__raw_writel(DDR3_EMIF_READ_LATENCY, EMIF4_0_DDR_PHY_CTRL_1_SHADOW);
__raw_writel(DDR3_EMIF_READ_LATENCY, EMIF4_0_DDR_PHY_CTRL_2);
__raw_writel(DDR3_EMIF_TIM1, EMIF4_0_SDRAM_TIM_1);
__raw_writel(DDR3_EMIF_TIM1, EMIF4_0_SDRAM_TIM_1_SHADOW);
__raw_writel(DDR3_EMIF_TIM2, EMIF4_0_SDRAM_TIM_2);
__raw_writel(DDR3_EMIF_TIM2, EMIF4_0_SDRAM_TIM_2_SHADOW);
__raw_writel(DDR3_EMIF_TIM3, EMIF4_0_SDRAM_TIM_3);
__raw_writel(DDR3_EMIF_TIM3, EMIF4_0_SDRAM_TIM_3_SHADOW);
__raw_writel(DDR3_EMIF_SDCFG, EMIF4_0_SDRAM_CONFIG);
__raw_writel(DDR3_EMIF_SDCFG, EMIF4_0_SDRAM_CONFIG2);
/* __raw_writel(EMIF_SDMGT, EMIF0_0_SDRAM_MGMT_CTRL);
__raw_writel(EMIF_SDMGT, EMIF0_0_SDRAM_MGMT_CTRL_SHD); */
__raw_writel(0x00004650, EMIF4_0_SDRAM_REF_CTRL);
__raw_writel(0x00004650, EMIF4_0_SDRAM_REF_CTRL_SHADOW);
for (i = 0; i < 5000; i++) {
}
__raw_writel(DDR3_EMIF_SDREF, EMIF4_0_SDRAM_REF_CTRL);
__raw_writel(DDR3_EMIF_SDREF, EMIF4_0_SDRAM_REF_CTRL_SHADOW);
__raw_writel(DDR3_ZQ_CFG, EMIF4_0_ZQ_CONFIG);
__raw_writel(DDR3_EMIF_SDCFG, 0x44E10000+0x110);
/* __raw_writel(EMIF_SDMGT, EMIF0_0_SDRAM_MGMT_CTRL);
__raw_writel(EMIF_SDMGT, EMIF0_0_SDRAM_MGMT_CTRL_SHD); */
//__raw_writel(EMIF_SDREF, EMIF4_0_SDRAM_REF_CTRL);
//__raw_writel(EMIF_SDREF, EMIF4_0_SDRAM_REF_CTRL_SHADOW);
__raw_writel(DDR3_EMIF_SDCFG, EMIF4_0_SDRAM_CONFIG);
__raw_writel(DDR3_EMIF_SDCFG, EMIF4_0_SDRAM_CONFIG2);
}
#define DDR3_EMIF_SDREF 0x0000093B
#define DDR3_ZQ_CFG 0x50074BE4
#define DDR3_EMIF_SDCFG 0x61C04BB2
下面是几个宏定义,我实验了一下,好像只配置了一片,另外一片没有配置上,哪位大神有案例,参考一下。
查看了你附的原理图,没有看到任何关于VTT temination的处理,
两片8bit的DDR3与AM335X连接时,必须做VTT temination的
详细设计可以参考AM335X的DATASHEET中Figure 5-49. 16-Bit DDR3 Interface Using Two 8-Bit DDR3 Devices
提个醒,我们的uboot是从04.00.00.08版本开始支持DDR3的:http://processors.wiki.ti.com/index.php/AM335x-PSP_04.06.00.08_Release_Notes
软件上面需确认相关clock配置是否正确。