我采用了自己开发的一块基于am3354bzcz芯片的板卡,现在想將 c16 c17管脚配置为I2C0的scl和sda,可是向寄存器conf_i2c0_sda,conf_i2c0_scl写值不成功,一直为默认值,无法改写,但是可以读,请问是什么原因?写这些寄存器有什么特殊的要求或配置吗?求大神解答,不胜感激!!!
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代码
int main(void)
{
I2C0ModuleClkConfig();
I2CPinMuxSetup(0);
其中这两个函数为
void I2CPinMuxSetup(unsigned int instance)
{
int sda_tmp,sdl_tmp,i2c_pinmux;
i2c_pinmux = ~CONTROL_CONF_MUXMODE(7);
sda_tmp = HWREG(SOC_CONTROL_REGS + CONTROL_CONF_I2C0_SDA);
sdl_tmp = HWREG(SOC_CONTROL_REGS + CONTROL_CONF_I2C0_SCL);
printf(" The origion sda value is %d\n",sda_tmp);
printf(" The origion sdl value is %d\n",sdl_tmp);
if(instance == 0)
{
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_I2C0_SDA) =
(CONTROL_CONF_I2C0_SDA_CONF_I2C0_SDA_RXACTIVE |
CONTROL_CONF_I2C0_SDA_CONF_I2C0_SDA_SLEWCTRL |
CONTROL_CONF_I2C0_SDA_CONF_I2C0_SDA_PUTYPESEL & i2c_pinmux );
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_I2C0_SCL) =
(CONTROL_CONF_I2C0_SCL_CONF_I2C0_SCL_RXACTIVE |
CONTROL_CONF_I2C0_SCL_CONF_I2C0_SCL_SLEWCTRL |
CONTROL_CONF_I2C0_SCL_CONF_I2C0_SCL_PUTYPESEL & i2c_pinmux);
printf(" The modified sda value is %d\n",sda_tmp);
printf(" The modified sdl value is %d\n",sdl_tmp);
}
else if(instance == 1)
{
/* I2C_SCLK */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_D1) =
(CONTROL_CONF_SPI0_D1_CONF_SPI0_D1_PUTYPESEL |
CONTROL_CONF_SPI0_D1_CONF_SPI0_D1_RXACTIVE |
CONTROL_CONF_SPI0_D1_CONF_SPI0_D1_SLEWCTRL |
CONTROL_CONF_MUXMODE(2));
/* I2C_SDA */
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_SPI0_CS0) =
(CONTROL_CONF_SPI0_CS0_CONF_SPI0_CS0_PUTYPESEL |
CONTROL_CONF_SPI0_CS0_CONF_SPI0_CS0_RXACTIVE |
CONTROL_CONF_SPI0_D1_CONF_SPI0_D1_SLEWCTRL |
CONTROL_CONF_MUXMODE(2));
}
}
/**
* \brief This function will configure the required clocks for I2C1 instance.
*
* \return None.
*
*/
/*
** This function enables the system L3 and system L4_WKUP clocks.
** This also enables the clocks for I2C0 instance.
*/
void I2C0ModuleClkConfig(void)
{
/* Configuring L3 Interface Clocks. */
/* Writing to MODULEMODE field of CM_PER_L3_CLKCTRL register. */
HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) |=
CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE;
/* Waiting for MODULEMODE field to reflect the written value. */
while(CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE !=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) &
CM_PER_L3_CLKCTRL_MODULEMODE));
/* Writing to MODULEMODE field of CM_PER_L3_INSTR_CLKCTRL register. */
HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) |=
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE;
/* Waiting for MODULEMODE field to reflect the written value. */
while(CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE !=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) &
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE));
/* Writing to CLKTRCTRL field of CM_PER_L3_CLKSTCTRL register. */
HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) |=
CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
/* Waiting for CLKTRCTRL field to reflect the written value. */
while(CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP !=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
CM_PER_L3_CLKSTCTRL_CLKTRCTRL));
/* Writing to CLKTRCTRL field of CM_PER_OCPWP_L3_CLKSTCTRL register. */
HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) |=
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
/*Waiting for CLKTRCTRL field to reflect the written value. */
while(CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP !=
(HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL));
/* Writing to CLKTRCTRL field of CM_PER_L3S_CLKSTCTRL register. */
HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) |=
CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
/*Waiting for CLKTRCTRL field to reflect the written value. */
while(CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP !=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
CM_PER_L3S_CLKSTCTRL_CLKTRCTRL));
/* Checking fields for necessary values. */
/* Waiting for IDLEST field in CM_PER_L3_CLKCTRL register to be set to 0x0. */
while((CM_PER_L3_CLKCTRL_IDLEST_FUNC << CM_PER_L3_CLKCTRL_IDLEST_SHIFT)!=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) &
CM_PER_L3_CLKCTRL_IDLEST));
/*
** Waiting for IDLEST field in CM_PER_L3_INSTR_CLKCTRL register to attain the
** desired value.
*/
while((CM_PER_L3_INSTR_CLKCTRL_IDLEST_FUNC <<
CM_PER_L3_INSTR_CLKCTRL_IDLEST_SHIFT)!=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) &
CM_PER_L3_INSTR_CLKCTRL_IDLEST));
/*
** Waiting for CLKACTIVITY_L3_GCLK field in CM_PER_L3_CLKSTCTRL register to
** attain the desired value.
*/
while(CM_PER_L3_CLKSTCTRL_CLKACTIVITY_L3_GCLK !=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
CM_PER_L3_CLKSTCTRL_CLKACTIVITY_L3_GCLK));
/*
** Waiting for CLKACTIVITY_OCPWP_L3_GCLK field in CM_PER_OCPWP_L3_CLKSTCTRL
** register to attain the desired value.
*/
while(CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L3_GCLK !=
(HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L3_GCLK));
/*
** Waiting for CLKACTIVITY_L3S_GCLK field in CM_PER_L3S_CLKSTCTRL register
** to attain the desired value.
*/
while(CM_PER_L3S_CLKSTCTRL_CLKACTIVITY_L3S_GCLK !=
(HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
CM_PER_L3S_CLKSTCTRL_CLKACTIVITY_L3S_GCLK));
/* Configuring registers related to Wake-Up region. */
/* Writing to MODULEMODE field of CM_WKUP_CONTROL_CLKCTRL register. */
HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CONTROL_CLKCTRL) |=
CM_WKUP_CONTROL_CLKCTRL_MODULEMODE_ENABLE;
/* Waiting for MODULEMODE field to reflect the written value. */
while(CM_WKUP_CONTROL_CLKCTRL_MODULEMODE_ENABLE !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CONTROL_CLKCTRL) &
CM_WKUP_CONTROL_CLKCTRL_MODULEMODE));
/* Writing to CLKTRCTRL field of CM_PER_L3S_CLKSTCTRL register. */
HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CLKSTCTRL) |=
CM_WKUP_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
/*Waiting for CLKTRCTRL field to reflect the written value. */
while(CM_WKUP_CLKSTCTRL_CLKTRCTRL_SW_WKUP !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CLKSTCTRL) &
CM_WKUP_CLKSTCTRL_CLKTRCTRL));
/* Writing to CLKTRCTRL field of CM_L3_AON_CLKSTCTRL register. */
HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CM_L3_AON_CLKSTCTRL) |=
CM_WKUP_CM_L3_AON_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
/*Waiting for CLKTRCTRL field to reflect the written value. */
while(CM_WKUP_CM_L3_AON_CLKSTCTRL_CLKTRCTRL_SW_WKUP !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CM_L3_AON_CLKSTCTRL) &
CM_WKUP_CM_L3_AON_CLKSTCTRL_CLKTRCTRL));
/* Writing to MODULEMODE field of CM_WKUP_I2C0_CLKCTRL register. */
HWREG(SOC_CM_WKUP_REGS + CM_WKUP_I2C0_CLKCTRL) |=
CM_WKUP_I2C0_CLKCTRL_MODULEMODE_ENABLE;
/* Waiting for MODULEMODE field to reflect the written value. */
while(CM_WKUP_I2C0_CLKCTRL_MODULEMODE_ENABLE !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_I2C0_CLKCTRL) &
CM_WKUP_I2C0_CLKCTRL_MODULEMODE));
/* Verifying if the other bits are set to required settings. */
/*
** Waiting for IDLEST field in CM_WKUP_CONTROL_CLKCTRL register to attain
** desired value.
*/
while((CM_WKUP_CONTROL_CLKCTRL_IDLEST_FUNC <<
CM_WKUP_CONTROL_CLKCTRL_IDLEST_SHIFT) !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CONTROL_CLKCTRL) &
CM_WKUP_CONTROL_CLKCTRL_IDLEST));
/*
** Waiting for CLKACTIVITY_L3_AON_GCLK field in CM_L3_AON_CLKSTCTRL
** register to attain desired value.
*/
while(CM_WKUP_CM_L3_AON_CLKSTCTRL_CLKACTIVITY_L3_AON_GCLK !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CM_L3_AON_CLKSTCTRL) &
CM_WKUP_CM_L3_AON_CLKSTCTRL_CLKACTIVITY_L3_AON_GCLK));
/*
** Waiting for IDLEST field in CM_WKUP_L4WKUP_CLKCTRL register to attain
** desired value.
*/
while((CM_WKUP_L4WKUP_CLKCTRL_IDLEST_FUNC <<
CM_WKUP_L4WKUP_CLKCTRL_IDLEST_SHIFT) !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_L4WKUP_CLKCTRL) &
CM_WKUP_L4WKUP_CLKCTRL_IDLEST));
/*
** Waiting for CLKACTIVITY_L4_WKUP_GCLK field in CM_WKUP_CLKSTCTRL register
** to attain desired value.
*/
while(CM_WKUP_CLKSTCTRL_CLKACTIVITY_L4_WKUP_GCLK !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CLKSTCTRL) &
CM_WKUP_CLKSTCTRL_CLKACTIVITY_L4_WKUP_GCLK));
/*
** Waiting for CLKACTIVITY_L4_WKUP_AON_GCLK field in CM_L4_WKUP_AON_CLKSTCTRL
** register to attain desired value.
*/
while(CM_WKUP_CM_L4_WKUP_AON_CLKSTCTRL_CLKACTIVITY_L4_WKUP_AON_GCLK !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CM_L4_WKUP_AON_CLKSTCTRL) &
CM_WKUP_CM_L4_WKUP_AON_CLKSTCTRL_CLKACTIVITY_L4_WKUP_AON_GCLK));
/*
** Waiting for CLKACTIVITY_I2C0_GFCLK field in CM_WKUP_CLKSTCTRL
** register to attain desired value.
*/
while(CM_WKUP_CLKSTCTRL_CLKACTIVITY_I2C0_GFCLK !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_CLKSTCTRL) &
CM_WKUP_CLKSTCTRL_CLKACTIVITY_I2C0_GFCLK));
/*
** Waiting for IDLEST field in CM_WKUP_I2C0_CLKCTRL register to attain
** desired value.
*/
while((CM_WKUP_I2C0_CLKCTRL_IDLEST_FUNC <<
CM_WKUP_I2C0_CLKCTRL_IDLEST_SHIFT) !=
(HWREG(SOC_CM_WKUP_REGS + CM_WKUP_I2C0_CLKCTRL) &
CM_WKUP_I2C0_CLKCTRL_IDLEST));
}
打印语句打印的结果是
The origion sda value is 55
The origion sdl value is 55
The modified sda value is 55
The modified sdl value is 55
请问是不是在进行pinmux之前还需要进行什么操作而我不知道?