>環境描述
Code Composer Studio Version: 5.5.0.00077
AM335X_StarterWare_02_00_01_01
DDR3:128M DDR
>關於AM335x Cache的配置需求:
參考範例中的static void MMUConfigAndEnable(void);
根據我們的需求:
regionOcmc與regionDev都不變動
將128M DDR區分為:
regionDdr - 96M(Cache)
regionStack - 16M(non-cacheable)
regionLcd - 16M(non-cacheable)
我這邊有疑問的是:
pageTable的大小是否需要根據劃分的REGION做調整呢? 如需要那該怎麼調整?
以下分別是CMD file與MMU配置的內容
[CMD FILE]
-stack 0x1000000 /* SOFTWARE STACK SIZE */ // 16M
-heap 0x1000000 /* HEAP AREA SIZE */ // 16M
-e Entry
--diag_suppress=10063
/* SPECIFY THE SYSTEM MEMORY MAP */
MEMORY
{
SRAM: o = 0x402F0400 l = 0x0000FC00 /* 64kB internal SRAM */
L3OCMC0: o = 0x40300000 l = 0x00010000 /* 64kB L3 OCMC SRAM */
DDR_MEM: o = 0x80000000 l = 0x8000000 /* 128M external DDR Bank 0 */
}
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
SECTIONS
{
.text:Entry : load > 0x80000000
.text : load > DDR_MEM /* CODE */
.data : load > DDR_MEM /* INITIALIZED GLOBAL AND STATIC VARIABLES */
.bss : load > DDR_MEM /* UNINITIALIZED OR ZERO INITIALIZED */
/* GLOBAL & STATIC VARIABLES */
RUN_START(bss_start)
RUN_END(bss_end)
.const : load > DDR_MEM /* GLOBAL CONSTANTS */
.sysmem : load > DDR_MEM
.cinit : load > DDR_MEM
.lcdbuf : load > 0x86000000 // 0x86000000~0x86FFFFFF
.stack : load > 0x87000000 // 0x87000000~0x87FFFFFF
}
[MMU程式片斷]
#define NUM_SECTIONS_DDR (96) // DDR 96M
#define NUM_SECTIONS_STACK (16) // DDR 16M
#define NUM_SECTIONS_LCD (16) // DDR 16M
#define START_ADDR_DDR (0x80000000) // 0x80000000~0x85FFFFFF
#define START_ADDR_LCD (0x86000000) // 0X86000000~0x86FFFFFF
#define START_ADDR_STACK (0x87000000) // 0X87000000~0x87FFFFFF
static volatile unsigned int pageTable[4*1024] __attribute__((aligned(16*1024)));
// 無快取, memtype_normal
REGION regionLcd = {
MMU_PGTYPE_SECTION, START_ADDR_LCD, NUM_SECTIONS_LCD, // Number of Pages in the region
MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_NON_CACHEABLE, MMU_NON_CACHEABLE),
MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
(unsigned int*)pageTable
};
// 無快取, memtype_normal
REGION regionStack = {
MMU_PGTYPE_SECTION, START_ADDR_STACK, NUM_SECTIONS_STACK, // Number of Pages in the region
MMU_MEMTYPE_NORMAL_NON_SHAREABLE(MMU_NON_CACHEABLE, MMU_NON_CACHEABLE),
MMU_REGION_NON_SECURE, MMU_AP_PRV_RW_USR_RW,
(unsigned int*)pageTable
};