多核间用MSMC全局变量同步的问题

The operations on Core 0 are:

Write Flag at shared memory

If(Cache is enabled for access shared memory)

{

 If(L2 Cache Size>0)

 {

   CACHE_wbL2(flag address, size of flag);

 }

 Else if(L1D Cache Size>0)

 {

   CACHE_wbL1D(flag address, size of flag);

 }

}

The operations on Core 1 are:

If(Cache is enabled for access shared memory)

{

 If(L2 Cache Size>0)

 {

   CACHE_invL2(flag address, size of flag);

 }

 Else if(L1D Cache Size>0)

 {

   CACHE_invL1D(flag address, size of flag);

 }

}

If(Prefetch buffer is enabled for access Core X’s L2 RAM)

{

 Invalidate Prefetch Buffer;

}

Read Flag at shared memory