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SRIOLoopbackDioIsr采用默认回环模式测试正常。但是如果将systemHeap从L2SRAM上换到DDR3上，即将接收和发送缓存都放到DDR3上，则如果按照例程中先NWRITE一次再NREAD一次则肯定NREAD失败，反过来先NREAD一次再NWRITE一次则肯定NWRITE失败。这是为什么？放到MSMCSRAM上也一样情况。
失败时CC都是正确，完成中断也进入了，但是接收缓存里并无数据
