Hi，大家好！
自己做的板卡，板卡上有两块6678，焊接了2块！
其中一块板卡工作正常，另一块板卡运行gel文件时出错，错误提示如下：
C66xx_0: GEL Output:
Connecting Target...
C66xx_0: GEL Output: DSP core #0
C66xx_0: GEL Output: C6678L GEL file Ver is 2.004
C66xx_0: GEL Output: Global Default Setup...
C66xx_0: GEL Output: Setup Cache...
C66xx_0: GEL Output: L1P = 32K
C66xx_0: GEL Output: L1D = 32K
C66xx_0: GEL Output: L2 = ALL SRAM
C66xx_0: GEL Output: Setup Cache... Done.
C66xx_0: GEL Output: Main PLL (PLL1) Setup ...
C66xx_0: GEL Output: PLL in Bypass ...
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup... Done.
C66xx_0: GEL Output: Power on all PSC modules and DSP domains...
C66xx_0: GEL Output: Set_PSC_State... Timeout Error #03 pd=0, md=3!
C66xx_0: GEL Output: Set_PSC_State... Timeout Error #02 pd=2, md=8!
C66xx_0: GEL Output: Set_PSC_State... Timeout Error #01 pd=2, md=9!
C66xx_0: GEL Output: Set_PSC_State... Timeout Error #03 pd=3, md=10!
C66xx_0: GEL Output: Power on all PSC modules and DSP domains... Done.
C66xx_0: GEL Output: PA PLL (PLL3) Setup ...
C66xx_0: GEL Output: PA PLL Setup... Done.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup ...
C66xx_0: GEL Output: DDR3 PLL Setup... Done.
C66xx_0: GEL Output: XMC Setup ... Done
C66xx_0: GEL Output: DDR3 initialization for 333MHz bus clock...
C66xx_0: GEL Output: DDR done
C66xx_0: GEL Output: DDR3 memory test... Started
C66xx_0: Trouble Reading Memory Block at 0x800000d4 on Page 0 of Length 0x4: (Error -1178 @ 0x800000D4) Device functional clock appears to be off. Power-cycle the board. If error persists, confirm configuration and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.0.520.0)
C66xx_0: GEL: Error while executing OnTargetConnect(): target access failed.
问题分析:
1、虽然加载gel文件有错误，但仿真器是可以连接上的，且起始地址为0x00201154。
2、于是想不加GEL文件，直接load程序（.out文件，程序与DDR3无关）,发现程序load不进去，提示如下：
C66xx_0: Trouble Writing Register PC: (Error -1060 @ 0x5F) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.0.520.0)
3、检查硬件电路：
时钟测试：所有进DSP时钟端的耦合电容两边都有时钟，系统时钟输出为：16.67M（输入时钟为100M）
电压测试：近端（DSP端）测试电压值 1.8v ，1v（可变），1v（固定） ，1.5v ，0,75v 都有，波纹都不大。
复位：现状态 Resetstatz 为高 ，且两个板子用的是同一套上电顺序的程序。
问题找了一周了，实在是不知道哪里出了错误。求助下各位，还有那些地方需要注意的或者检查的？帮忙看看！
谢谢！
