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请教：
从CorePac文档中得知，L1和L2的 Error Detection and Correction功能在最初是禁止的。那么在应用中有必要将它使能吗？它会提高RAM访问的正确性是吗？会不会影响访问效率呢？
使能可以进行1bit错误检查及纠正，肯定是可以提高RAM的稳定性，这都是硬件在做，不会影响效率，实际应用中建议使能，参考STK例程中都是使能EDC。
STK:http://www.deyisupport.com/question_answer/dsp_arm/c6000_multicore/f/53/t/47664.aspx
