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在DVRRDK的multich_vcap_venc_vdis.c中的Link连接问题



在这个例子中,视频流数据在DUP之后,一路通过merge0 link送到编码Link,然后到A8做存储;另一路通过merge1 link送出去做显示,现在的问题是 为什么在merge1 link与马赛克之间还加了这四个link?这么做有什么意思吗?