hi,大神们
我现在自己的板子使用的AM3352,两个端口都使用的RGMII接口模式,现在两个端口表现一样的情况,ping数据包不通,测试发现TXD没数据,RXD和RXCLK,txclk都有数据,这个是什么原因啊,忘解答啊,谢谢啦!
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hi,Gary Wu
我这使用的PHY型号为RTL8211E. 我的应用中是想把2个端口都使用为RGMII模式,分别连接一个PHY。在u-BOOT环境下调试
PHY的硬件地址设置为:1和4;
修改的内容有:
mux.c中的配置如下:
static struct module_pin_mux rgmii1_pin_mux[] = {
{OFFSET(mii1_txen), MODE(2)}, /* RGMII1_TCTL */
{OFFSET(mii1_rxdv), MODE(2) | RXACTIVE}, /* RGMII1_RCTL */
{OFFSET(mii1_txd3), MODE(2)}, /* RGMII1_TD3 */
{OFFSET(mii1_txd2), MODE(2)}, /* RGMII1_TD2 */
{OFFSET(mii1_txd1), MODE(2)}, /* RGMII1_TD1 */
{OFFSET(mii1_txd0), MODE(2)}, /* RGMII1_TD0 */
{OFFSET(mii1_txclk), MODE(2)}, /* RGMII1_TCLK */
{OFFSET(mii1_rxclk), MODE(2) | RXACTIVE}, /* RGMII1_RCLK */
{OFFSET(mii1_rxd3), MODE(2) | RXACTIVE}, /* RGMII1_RD3 */
{OFFSET(mii1_rxd2), MODE(2) | RXACTIVE}, /* RGMII1_RD2 */
{OFFSET(mii1_rxd1), MODE(2) | RXACTIVE}, /* RGMII1_RD1 */
{OFFSET(mii1_rxd0), MODE(2) | RXACTIVE}, /* RGMII1_RD0 */
{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
{-1},
};
static struct module_pin_mux rgmii2_pin_mux[] = {
{OFFSET(gpmc_a0), MODE(2)}, /* RGMII2_TCTL */
{OFFSET(gpmc_a1), MODE(2) | RXACTIVE}, /* RGMII2_RCTL */
{OFFSET(gpmc_a2), MODE(2)}, /* RGMII2_TD3 */
{OFFSET(gpmc_a3), MODE(2)}, /* RGMII2_TD2 */
{OFFSET(gpmc_a4), MODE(2)}, /* RGMII2_TD1 */
{OFFSET(gpmc_a5), MODE(2)}, /* RGMII2_TD0 */
{OFFSET(gpmc_a6), MODE(2)}, /* RGMII2_TCLK */
{OFFSET(gpmc_a7), MODE(2) | RXACTIVE}, /* RGMII2_RCLK */
{OFFSET(gpmc_a8), MODE(2) | RXACTIVE}, /* RGMII2_RD3 */
{OFFSET(gpmc_a9), MODE(2) | RXACTIVE}, /* RGMII2_RD2 */
{OFFSET(gpmc_a10), MODE(2) | RXACTIVE}, /* RGMII2_RD1 */
{OFFSET(gpmc_a11), MODE(2) | RXACTIVE}, /* RGMII2_RD0 */
{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
{-1},
};
board.c
更改PHY 地址:
static struct cpsw_slave_data cpsw_slaves[] = {
{
.slave_reg_ofs = 0x208,
.sliver_reg_ofs = 0xd80,
.phy_id = 1,
},
{
.slave_reg_ofs = 0x308,
.sliver_reg_ofs = 0xdc0,
.phy_id = 4,
},
};
设置gmii_sel:0x3A
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_RGMII;
am335x_evm.h 中
#define CONFIG_PHY_REALTEK 增加定义
在net/phy.realtek
中更改ID 为:0x1cc915 PHY的ID
主要是做了这些修改,前期调试发现TX_CLK只有输出10Mhz,后面更改core_pll_config(OPP_100)能够正常出25Mhz;{初始化的时候为core_pll_config(OPP_50);}
现在ping包的时候:
U-Boot# setenv ipaddr 192.168.100.5
U-Boot# ping 192.168.100.20
link up on port 0, speed 1000, full duplex
Using cpsw device
ping failed; host 192.168.100.20 is not alive
用示波器测试,TXD上面什么信号都没有,但RXD上数据正常
各位大神,请帮忙指导啊,小弟以前没搞过驱动,现在都是在瞎弄啊,没头绪了,你们有没好的指导手册如果更改PHY这块啊,感觉TI 的这个CPU 怎么还有个CPSW,这个需要配置么?
坐等到天明,3Q