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AM335x不支持STN屏? 急救 !




由于成本因素,客户需要使用显示效果较差的黑白单色4位的STN型屏幕,为此我在原来标准的TFP屏配置结构上修改参数。
屏幕分辨率为240x120的,根据参数我把arch/arm/mach-omap2/board-am335xevm.c内
static const struct display_panel disp_panel = {
    WVGA,
    32,
    32,
    COLOR_ACTIVE,
};改为
static const struct display_panel disp_panel = {
    WVGA,
    1,
    1,
    MONOCHROME,
};
结构lcd_cfg改为如下
static struct lcd_ctrl_config lcd_cfg = {
    &disp_panel,
    .ac_bias        = 255,
    .ac_bias_intrpt        = 0,
    .dma_burst_sz        = 16,
    .bpp            = 1,
    .fdd            = 0x80,
    .tft_alt_mode        = 0,
    .stn_565_mode        = 0,
    .mono_8bit_mode        = 0,
    .invert_line_clock    = 1,
    .invert_frm_clock    = 1,
    .sync_edge        = 0,
    .sync_ctrl        = 1,
    .raster_order        = 0,
};
然后把drivers/video/da8xx-fb.c内的的known_lcd_panels结构添加
static struct da8xx_panel known_lcd_panels[] = {
[4] = {
        .name = "TOPWAY_240128_LCD",
        .width = 240,
        .height = 128,
        .hfp = 10,
        .hbp = 10,
        .hsw = 26,
        .vfp = 10,
        .vbp = 10,
        .vsw = 17,
        .pxl_clk = 1307200,
        .invert_pxl_clk = 0,
        
    },
}

使用该配置后发现管脚lcd_pclk与lcd_vsync均有波形输出,但管脚lcd_hsync与lcd_data0 ~ lcd_data3均没有任何变化。
后经过多次修改测试发现,只要把 disp_panel结构中的屏幕类型改为非COLOR_ACTIVE即(COLOR_PASSIVE或MONOCHROME)时lcd_hsync与lcd_data0~3就没有时钟或数据输出。比如我在原先tft屏幕配置时测量管脚lcd_hsycn有时钟,一旦我在终端中直接修改LCD控制器的RASTER_CTRL寄存器(0x4830e028)的 lcdtft位(bit7),将其设置成stn模式(清零)时,lcd_hsync时钟马上消失。
从现象来看,难道AM335x的LCD控制器不支持STN ? 求TI专家解答。

  • AM335x的LCD控制器是支持STN的,你可以参考TRM的13.1.2章节,应该还是配置上的问题。

    • Passive Matrix LCD Panels
    – Panel types including STN, DSTN, and C-DSTN
    – AC Bias Control

  • 多谢Steven回复,我知道手册上有说明支持stn,但现实问题就是没有行同步时钟输出,如果配置有误的话,不知能否提供一个类似的配置代码参考。

  • 由于我们的开发板上都是使用的TFT屏,所以现成的参考代码配置可能是没有。不过你可以通过E2E论坛上搜一搜,找到相关使用STN屏幕的问题,看对你有没有帮助。

    am335x STN LCD timing

    http://e2e.ti.com/support/arm/sitara_arm/f/791/t/316896.aspx

  • 请您先查查pinmux的配置

  • 与我的tft屏配置一致,这个应该没什么问题

    root@SWA3300:/work/data# cat /sys/kernel/debug/omap_mux/
    Display all 126 possibilities? (y or n)
    root@SWA3300:/work/data# cat /sys/kernel/debug/omap_mux/lcd_*
    name: lcd_ac_bias_en.lcd_ac_bias_en (0x44e108ec/0x8ec = 0x0000), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
    signals: lcd_ac_bias_en | NA | NA | NA | NA | NA | NA | gpio2_25
    name: lcd_data0.lcd_data0 (0x44e108a0/0x8a0 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data0 | gpmc_a0 | NA | NA | NA | NA | NA | gpio2_6
    name: lcd_data1.lcd_data1 (0x44e108a4/0x8a4 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data1 | gpmc_a1 | NA | NA | NA | NA | NA | gpio2_7
    name: lcd_data10.lcd_data10 (0x44e108c8/0x8c8 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data10 | gpmc_a14 | NA | mcasp0_axr0 | NA | NA | NA | gpio2_16
    name: lcd_data11.lcd_data11 (0x44e108cc/0x8cc = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data11 | gpmc_a15 | NA | mcasp0_ahclkr | mcasp0_axr2 | NA | NA | gpio2_17
    name: lcd_data12.lcd_data12 (0x44e108d0/0x8d0 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data12 | gpmc_a16 | NA | mcasp0_aclkr | mcasp0_axr2 | NA | NA | gpio0_8
    name: lcd_data13.lcd_data13 (0x44e108d4/0x8d4 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data13 | gpmc_a17 | NA | mcasp0_fsr | mcasp0_axr3 | NA | NA | gpio0_9
    name: lcd_data14.lcd_data14 (0x44e108d8/0x8d8 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data14 | gpmc_a18 | NA | mcasp0_axr1 | NA | NA | NA | gpio0_10
    name: lcd_data15.lcd_data15 (0x44e108dc/0x8dc = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data15 | gpmc_a19 | NA | mcasp0_ahclkx | mcasp0_axr3 | NA | NA | gpio0_11
    name: lcd_data2.lcd_data2 (0x44e108a8/0x8a8 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data2 | gpmc_a2 | NA | NA | NA | NA | NA | gpio2_8
    name: lcd_data3.lcd_data3 (0x44e108ac/0x8ac = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data3 | gpmc_a3 | NA | NA | NA | NA | NA | gpio2_9
    name: lcd_data4.lcd_data4 (0x44e108b0/0x8b0 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data4 | gpmc_a4 | NA | NA | NA | NA | NA | gpio2_10
    name: lcd_data5.lcd_data5 (0x44e108b4/0x8b4 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data5 | gpmc_a5 | NA | NA | NA | NA | NA | gpio2_11
    name: lcd_data6.lcd_data6 (0x44e108b8/0x8b8 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data6 | gpmc_a6 | NA | NA | NA | NA | NA | gpio2_12
    name: lcd_data7.lcd_data7 (0x44e108bc/0x8bc = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data7 | gpmc_a7 | NA | NA | NA | NA | NA | gpio2_13
    name: lcd_data8.lcd_data8 (0x44e108c0/0x8c0 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data8 | gpmc_a12 | NA | mcasp0_aclkx | NA | NA | uart2_ctsn | gpio2_14
    name: lcd_data9.lcd_data9 (0x44e108c4/0x8c4 = 0x0008), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PULL_DISA
    signals: lcd_data9 | gpmc_a13 | NA | mcasp0_fsx | NA | NA | uart2_rtsn | gpio2_15
    name: lcd_hsync.lcd_hsync (0x44e108e4/0x8e4 = 0x0000), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
    signals: lcd_hsync | NA | NA | NA | NA | NA | NA | gpio2_23
    name: lcd_pclk.lcd_pclk (0x44e108e8/0x8e8 = 0x0000), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
    signals: lcd_pclk | NA | NA | NA | NA | NA | NA | gpio2_24
    name: lcd_vsync.lcd_vsync (0x44e108e0/0x8e0 = 0x0000), b NA, t NA
    mode: OMAP_MUX_MODE0 | AM33XX_PIN_OUTPUT
    signals: lcd_vsync | NA | NA | NA | NA | NA | NA | gpio2_22
    root@SWA3300:/work/data#

  • 经过对比寄存器发现 RASTER_TIMING_2 (0x4830e034)的bit25不一致,察看寄存器表发现该位有这样一句描述 “MUST be set to '0' for Passive Matrix displays”。而我的值却是1,对比代码把lcd_cfg结构体内sync_ctrl设为0后lcd_hsync也有时钟了。但数据线d0-d3仍然没变化(保持为0),查看中断(cat /proc/interrupts)发现就产生过一次中断