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PROCESSOR-SDK-J721S2: J721S2 MCU_SPI1片选信号始终无法拉高

Part Number: PROCESSOR-SDK-J721S2


你好,我在J721S2上调试MCU_SPI1时,片选信号时钟无法拉高。在MOSI上能检测到发送的数据波形,但无法正常接收数据。  我已经按照TRM中的5.5.23.2章节,将MCU_SPI1_CTRL[SPI1_LINKDIS], MCU_SPI1_CLKSEL[MSTR_LB_CLKSEL], and SPI3_CLKSEL[MSTR_LB_CLKSEL] 三个寄存器写1了,仍无法使MCU_SPI1片选拉低。 想请问一下,使用MCU_SPI1怎么设置,才能使其正常独立工作,不受SPI3影响?

  • 写这3个寄存器的代码如下,只有MCU_SPI1_CTRL[SPI1_LINKDIS]寄存器能读到1, MCU_SPI1_CLKSEL[MSTR_LB_CLKSEL], and SPI3_CLKSEL[MSTR_LB_CLKSEL] 这两个寄存器读到的值一直是0,没写进去。 能尽快帮我看下吗?项目卡这里了。


    CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_LOCK0_KICK0, 0x68EF3490);
    CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_LOCK0_KICK1,0xD172BC5A);
    regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_LOCK0_KICK0);
    while ((regVal & 0x1) != 0x1U)
    {
    regVal = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_LOCK0_KICK0);
    }

    /* Enable MCU_MCSPI1 and MCSPI3 independently pin out */
    CSL_REG32_WR(CSL_MCU_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_MCU_SPI1_CTRL, CSL_MCU_CTRL_MMR_CFG0_MCU_SPI1_CTRL_SPI1_LINKDIS_MASK);
    regVal = CSL_REG32_RD(CSL_MCU_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_MCU_SPI1_CTRL);
    AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
    APP_NAME ": Reg111 %d\n",
    regVal);

    CSL_REG32_WR(CSL_WKUP_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_MCU_TIMER5_CLKSEL + 16 ,1U);     
    regVal1 = CSL_REG32_RD(CSL_WKUP_CTRL_MMR0_CFG0_BASE + CSL_MCU_CTRL_MMR_CFG0_MCU_TIMER5_CLKSEL + 16 );         
    AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
    APP_NAME ": Reg222 %d\n",
    regVal1);

    CSL_REG32_WR(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_SPI3_CLKSEL + 16 ,1U);
    regVal2 = CSL_REG32_RD(CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_SPI3_CLKSEL + 16 );

    AppUtils_Printf(APP_UTILS_PRINT_MSG_NORMAL,
    APP_NAME ": Reg333 %d\n",
    regVal2);

  • 您好,您的问题我们升级到英文论坛看下,链接如下:

    e2e.ti.com/.../processor-sdk-j721s2-mcu_spi1-chip-select-signal-never-pulls-high