您好,如果不使用#pragma DATA_SECTION将数据放入指定内存空间时,使用edma传输结果正确,如果使用#pragma DATA_SECTION将源数据放入DDR3中,传输结果出现错误,代码如下,是什么原因引起的呢?
//#pragma DATA_SECTION(srcBuff,".src");
float srcBuff[1024];
float dstBuff[1024];
static Int32 gbl_region (Int32 instNum, Uint8 channelNum, float *srcBuff1, float *dstBuff1)
{
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle htrans;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;
int loopIndex;
/* Start the EDMA PING-PONG test over the Global Region. */
printf ("Debug: Testing EDMA(%d) Ping-Pong Test (Global) Region for Channel %d...\n", instNum, channelNum);
/* Initialize data */
for (loopIndex = 0; loopIndex < 1024; loopIndex++)
{
srcBuff1[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 1;
}
/* Module Initialization */
CSL_edma3Init(&context);
/* Open the EDMA Module using the provided instance number */
hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);
/* Channel open */
chAttr.regionNum = CSL_EDMA3_REGION_GLOBAL;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
/* For first EDMA instance there are only 2 TCs and 2 event queues
* Modify the channel default queue setup from 0 to 1
*/
CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1);
/* Map the DMA Channel to PARAM Block 2. */
//CSL_edma3MapDMAChannelToParamBlock (hModule, channelNum, 2);
CSL_edma3MapDMAChannelToParamBlock (hModule, channelNum, 1);
/* Obtain a handle to parameter set 2 */
// hParamPing = CSL_edma3GetParamHandle(hChannel, 2, &status);
htrans = CSL_edma3GetParamHandle(hChannel, 1, &status);
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN, \
0, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_EN, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR );
myParamSetup.srcAddr = (Uint32)srcBuff1;
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(1024*4,1);
myParamSetup.dstAddr = (Uint32)dstBuff1;
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1024*4,1024*4);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(0xffff,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(1024*4,1024*4);
myParamSetup.cCnt = 1;
/* htrans setup */
CSL_edma3ParamSetup(htrans,&myParamSetup);
/* Interrupt enable (Bits 0-1) for the global region interrupts */
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0x1;
regionIntr.intrh = 0x0000;
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,®ionIntr);
/* Trigger channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0;
regionIntr.intrh = 0;
/* Poll on IPR bit 0 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
/* Clear the pending bit */
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,®ionIntr);
/* Check transfer by comparing the source and destination buffers */
Verify_Transfer( srcBuff1, dstBuff1);
/* Close channel */
CSL_edma3ChannelClose(hChannel);
/* Close EDMA module */
CSL_edma3Close(hModule);
/* The test passed. */
return 0;
}
static Bool Verify_Transfer
(
float *srcBuff,
float *dstBuff
)
{
Uint16 key;
/* Invalidate the cache before verification */
/* Disable Interrupts */
key = _disable_interrupts();
CACHE_invL1d ((void *)srcBuff, 1024*sizeof(float), CACHE_WAIT);
CACHE_invL2 ((void *)srcBuff, 1024*sizeof(float), CACHE_WAIT);
CACHE_invL1d ((void *)dstBuff, 1024*sizeof(float), CACHE_WAIT);
CACHE_invL2 ((void *)dstBuff, 1024*sizeof(float), CACHE_WAIT);
_mfence();
/* Re-enable Interrupts. */
_restore_interrupts(key);
return TRUE;
}