TMS320C6678: 多核和EDMA3相关问题

1、使用openmp的条件：编译选项--omp、omp.h、链接openmp库，代码 使用 #pragma omp parallel for；运行结果：INTERNAL ERROR: Unexpected NULL pointer - src/tomp_parallel.c, 224

裸机上不用实时操作系统可以使用openmp吗？单核可以使用openmp吗？单核上物理线程数是多少？

2、我应该参考哪个EDMA3的示例代码？在哪个文件夹下？运行需要注意什么？以下的代码是如今使用EDMA3的合适方式么？（参考的代码是pdk_c667x_2_0_16\packages\ti\csl\example\edma\edma_test.c）

    /* Module Initialization */
    CSL_edma3Init(&context);


    /* Open the EDMA Module using the provided instance number */
 	 hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);


    /* Channel open */
    chAttr.regionNum = CSL_EDMA3_REGION_GLOBAL;
    chAttr.chaNum    = channelNum;
    hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);


    /* For first EDMA instance there are only 2 TCs and 2 event queues
	 * Modify the channel default queue setup from 0 to 1
	 */
    CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1);


    /* Map the DMA Channel to PARAM Block 1. */
    CSL_edma3MapDMAChannelToParamBlock (hModule, channelNum, 1);
    /* Obtain a handle to parameter set 1 */
    htrans = CSL_edma3GetParamHandle(hChannel, 1, &status);


	myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
											CSL_EDMA3_TCCH_DIS, \
											CSL_EDMA3_ITCINT_DIS, \
											CSL_EDMA3_TCINT_EN, \
											0, CSL_EDMA3_TCC_NORMAL,\
											CSL_EDMA3_FIFOWIDTH_NONE, \
											CSL_EDMA3_STATIC_EN, \
											CSL_EDMA3_SYNC_A, \
											CSL_EDMA3_ADDRMODE_INCR, \
											CSL_EDMA3_ADDRMODE_INCR );
	myParamSetup.srcAddr    = (Uint32)srcBuff1;
	myParamSetup.aCntbCnt   = CSL_EDMA3_CNT_MAKE(1024*4,1);
	myParamSetup.dstAddr    = (Uint32)dstBuff1;
	myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(1024*4,1024*4);
	myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(0xffff,0);
	myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(1024*4,1024*4);
	myParamSetup.cCnt = 1;

    /* htrans setup */
	CSL_edma3ParamSetup(htrans,&myParamSetup);


    /* Interrupt enable (Bits 0-1)  for the global region interrupts */
    regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
    regionIntr.intr   = 0x1;
    regionIntr.intrh  = 0x0000;
    CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,&regionIntr);

    /* Trigger channel */
    CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);

    regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
    regionIntr.intr   = 0;
    regionIntr.intrh  = 0;

    /* Poll on IPR bit 0 */
    do {
        CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,&regionIntr);
    } while (!(regionIntr.intr & 0x1));

    /* Clear the pending bit */
    CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,&regionIntr);


    /* Check transfer by comparing the source and destination buffers */
    Verify_Transfer( 1024, 1, 1, 0, 0, 0, 0, srcBuff1, dstBuff1, TRUE);




	/* Close channel */
    CSL_edma3ChannelClose(hChannel);


	/* Close EDMA module */
	CSL_edma3Close(hModule);