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C6678调试中遇到的错误

andy lee1
Expert 1240 points


各位专家好！

我在调试程序的时候出现了下面的错误，请问是什么原因？该如何解决呢？谢谢！

undefined     first referenced
  symbol           in file    
 ---------     ----------------
 DDR_Regs      ./DDRInit.obj  
 boot_cfg_regs ./DDRInit.obj  

error: unresolved symbols remain

我已经检查过， DDR_Regs 和 boot_cfg_regs这两个变量的定义所在的头文件都已经包含，这里还提示未定义是什么原因？谢谢！

  • 0
    Expert 1775 points

    楼主，您好！

    请确认 DDRInit.c 文件中 包含这两个变量的定义。

  • 0 回复 Bruce Chen1
    Expert 1240 points

    您好！BruceChen

    DDR_Init文件中直接使用了这两个变量，这两个变量的定义式在另外两个头文件中，DDR_Init.c文件中也是包含了这两个头文件的，所以应该不是定义的问题。请问还会是什么原因呢？谢谢！

  • 0 回复 andy lee1
    TI__Guru 61135 points

    您好，

    确认这两个变量的类型定义是否包含；请将这两个变量在两个文件中的定义代码发上来。

  • 0 回复 Andy Yin
    Expert 1240 points

    Andy Yin 您好！

    我确认了定义这两个变量的头文件已经在程序中包含，定义DDR_Regs的语句是：extern CSL_Emif4fRegs * DDR_Regs;其中 CSL_Emif4fRegs 的定义是在另外一个头文件中，这个头文件也已经包含，定义的代码如下：typedef struct  {

       volatile Uint32 EMIF_MOD_ID_REV;

       volatile Uint32 STATUS;

       volatile Uint32 SDRAM_CONFIG;

       volatile Uint32 SDRAM_CONFIG_2;

       volatile Uint32 SDRAM_REF_CTRL;

       volatile Uint32 SDRAM_REF_CTRL_SHDW;

       volatile Uint32 SDRAM_TIM_1;

       volatile Uint32 SDRAM_TIM_1_SHDW;

       volatile Uint32 SDRAM_TIM_2;

       volatile Uint32 SDRAM_TIM_2_SHDW;

       volatile Uint32 SDRAM_TIM_3;

       volatile Uint32 SDRAM_TIM_3_SHDW;

       volatile Uint32 LPDDR2_NVM_TIM;

       volatile Uint32 LPDDR2_NVM_TIM_SHDW;

       volatile Uint32 PWR_MGMT_CTRL;

       volatile Uint32 PWR_MGMT_CTRL_SHDW;

       volatile Uint32 LPDDR2_MODE_REG_DATA;

       volatile Uint8 RSVD0[12];

       volatile Uint32 LPDDR2_MODE_REG_CFG;

       volatile Uint32 VBUSM_CONFIG;

       volatile Uint32 VBUSM_CFG_VAL_1;

       volatile Uint32 VBUSM_CFG_VAL_2;

       volatile Uint32 IODFT_TLGC;

       volatile Uint32 IODFT_CTRL_MISR_RSLT;

       volatile Uint32 IODFT_ADDR_MISR_RSLT;

       volatile Uint32 IODFT_DATA_MISR_RSLT_1;

       volatile Uint32 IODFT_DATA_MISR_RSLT_2;

       volatile Uint32 IODFT_DATA_MISR_RSLT_3;

       volatile Uint32 IODFT_DATA_MISR_RSLT_4;

       volatile Uint32 IODFT_DATA_MISR_RSLT_5;

       volatile Uint32 PERF_CNT_1;

       volatile Uint32 PERF_CNT_2;

       volatile Uint32 PERF_CNT_CFG;

       volatile Uint32 PERF_CNT_SEL;

       volatile Uint32 PERF_CNT_TIM;

       volatile Uint8 RSVD1[4];

       volatile Uint32 READ_IDLE_CTRL;

       volatile Uint32 READ_IDLE_CTRL_SHDW;

       volatile Uint8 RSVD2[4];

       volatile Uint32 IRQSTATUS_RAW_SYS;

       volatile Uint8 RSVD3[4];

       volatile Uint32 IRQSTATUS_SYS;

       volatile Uint8 RSVD4[4];

       volatile Uint32 IRQENABLE_SET_SYS;

       volatile Uint8 RSVD5[4];

       volatile Uint32 IRQENABLE_CLR_SYS;

       volatile Uint8 RSVD6[8];

       volatile Uint32 ZQ_CONFIG;

       volatile Uint32 TEMP_ALERT_CONFIG;

       volatile Uint32 VBUSM_ERR_LOG;

       volatile Uint32 RDWR_LVL_RMP_WIN;

       volatile Uint32 RDWR_LVL_RMP_CTRL;

       volatile Uint32 RDWR_LVL_CTRL;

       volatile Uint8 RSVD7[4];

       volatile Uint32 DDR_PHY_CTRL_1;

       volatile Uint32 DDR_PHY_CTRL_1_SHDW;

       volatile Uint32 DDR_PHY_CTRL_2;

       volatile Uint8 RSVD8[16];

       volatile Uint32 PRI_COS_MAP;

       volatile Uint32 MSTID_COS_1_MAP;

       volatile Uint32 MSTID_COS_2_MAP;

       volatile Uint8 RSVD9[4];

       volatile Uint32 ECC_CTRL;

       volatile Uint32 ECC_ADDR_RNG_1;

       volatile Uint32 ECC_ADDR_RNG_2;

       volatile Uint8 RSVD10[4];

       volatile Uint32 RD_WR_EXEC_THRSH;

    } CSL_Emif4fRegs;

    boot_cfg_regs的定义语句为：extern CSL_BootcfgRegs * boot_cfg_regs;其中CSL_BootcfgRegs 的定义也是在另一个头文件中，而且这个头文件也已经包含，其定义如下：

    typedef struct  {

       volatile Uint32 REVISION_REG;

       volatile Uint8 RSVD0[4];

       volatile Uint32 DIE_ID_REG0;

       volatile Uint32 DIE_ID_REG1;

       volatile Uint32 DIE_ID_REG2;

       volatile Uint32 DIE_ID_REG3;

       volatile Uint32 DEVICE_ID_REG0;

       volatile Uint32 DEVICE_ID_REG1;

       volatile Uint32 BOOT_REG0;

       volatile Uint8 RSVD1[20];

       volatile Uint32 KICK_REG0;

       volatile Uint32 KICK_REG1;

    #ifdef CSL_MODIFICATION    

       volatile Uint32 BOOTADDR_GEM0_REG;

       volatile Uint32 BOOTADDR_GEM1_REG;

       volatile Uint32 BOOTADDR_GEM2_REG;

       volatile Uint32 BOOTADDR_GEM3_REG;

       volatile Uint32 BOOTADDR_GEM4_REG;

       volatile Uint32 BOOTADDR_GEM5_REG;

       volatile Uint32 BOOTADDR_GEM6_REG;

       volatile Uint32 BOOTADDR_GEM7_REG;

    #else

       volatile Uint32 BOOTADDR_GEM_REG[8];

    #endif    

       volatile Uint8 RSVD2[128];

       volatile Uint32 INTR_RAW_STATUS_REG;

       volatile Uint32 INTR_ENABLED_STATUS_REG;

       volatile Uint32 INTR_ENABLE_REG;

       volatile Uint32 INTR_ENABLE_CLR_REG;

       volatile Uint32 EOI_REG;

       volatile Uint32 FAULT_ADDRESS_REG;

       volatile Uint32 FAULT_STATUS_REG;

       volatile Uint32 FAULT_CLEAR_REG;

       volatile Uint8 RSVD3[16];

       volatile Uint32 EMAC_ID1;

       volatile Uint32 EMAC_ID2;

       volatile Uint32 SI_REV;

       volatile Uint8 RSVD4[20];

       volatile Uint32 LRSTNMISTAT_CLR;

       volatile Uint32 RESET_STAT_CLR;

       volatile Uint32 BOOT_LATCH;

       volatile Uint32 BOOT_COMPLETE;

       volatile Uint32 BOOT_PROGRESS;

       volatile Uint32 RESET_STAT;

       volatile Uint32 LRSTNMISTAT;

       volatile Uint32 DEVCFG;

       volatile Uint32 PWR_STAT;

       volatile Uint32 STS_SRIO;

       volatile Uint32 STS_SGMII;

       volatile Uint32 STS_PCIE;

       volatile Uint32 STS_VUSR;

       volatile Uint8 RSVD5[28];

       volatile Uint32 CLASS0_EFUSE_REG;

       volatile Uint8 RSVD6[12];

       volatile Uint32 EFUSE_REG0;

       volatile Uint32 EFUSE_REG1;

       volatile Uint32 EFUSE_REG2;

       volatile Uint32 EFUSE_REG3;

       volatile Uint32 EFUSE_REG4;

       volatile Uint32 EFUSE_REG5;

       volatile Uint32 EFUSE_REG6;

       volatile Uint32 EFUSE_REG7;

       volatile Uint32 EFUSE_REG8;

       volatile Uint32 EFUSE_REG9;

       volatile Uint32 EFUSE_REG10;

       volatile Uint32 EFUSE_REG11;

       volatile Uint32 EFUSE_REG12;

       volatile Uint32 EFUSE_REG13;

       volatile Uint32 EFUSE_REG14;

       volatile Uint32 EFUSE_REG15;

       volatile Uint8 RSVD7[48];

    #ifdef CSL_MODIFICATION    

       volatile Uint32 NMIGR_0;

       volatile Uint32 NMIGR_1;

       volatile Uint32 NMIGR_2;

       volatile Uint32 NMIGR_3;

       volatile Uint32 NMIGR_4;

       volatile Uint32 NMIGR_5;

       volatile Uint32 NMIGR_6;

       volatile Uint32 NMIGR_7;

    #else

       volatile Uint32 NMIGR[8];

    #endif    

       volatile Uint8 RSVD8[32];

    #ifdef CSL_MODIFICATION    

       volatile Uint32 IPCGR0;

       volatile Uint32 IPCGR1;

       volatile Uint32 IPCGR2;

       volatile Uint32 IPCGR3;

       volatile Uint32 IPCGR4;

       volatile Uint32 IPCGR5;

       volatile Uint32 IPCGR6;

       volatile Uint32 IPCGR7;

    #else

       volatile Uint32 IPCGR[8];

    #endif    

       volatile Uint8 RSVD9[28];

       volatile Uint32 IPCGRH;

    #ifdef CSL_MODIFICATION    

       volatile Uint32 IPCAR0;

       volatile Uint32 IPCAR1;

       volatile Uint32 IPCAR2;

       volatile Uint32 IPCAR3;

       volatile Uint32 IPCAR4;

       volatile Uint32 IPCAR5;

       volatile Uint32 IPCAR6;

       volatile Uint32 IPCAR7;

    #else

       volatile Uint32 IPCAR[8];

    #endif    

       volatile Uint8 RSVD10[28];

       volatile Uint32 IPCARH;

       volatile Uint8 RSVD11[64];

       volatile Uint32 TINPSEL;

       volatile Uint32 TOUTSEL;

    #ifdef CSL_MODIFICATION    

       volatile Uint32 RSTMUX0;

       volatile Uint32 RSTMUX1;

       volatile Uint32 RSTMUX2;

       volatile Uint32 RSTMUX3;

       volatile Uint32 RSTMUX4;

       volatile Uint32 RSTMUX5;

       volatile Uint32 RSTMUX6;

       volatile Uint32 RSTMUX7;

    #else

       volatile Uint32 RSTMUX[8];

    #endif

       volatile Uint32 CORE_PLL_CTL0;

       volatile Uint32 CORE_PLL_CTL1;

       volatile Uint32 DDR3_PLL_CTL0;

       volatile Uint32 DDR3_PLL_CTL1;

       volatile Uint32 PA_PLL_CTL0;

       volatile Uint32 PA_PLL_CTL1;

       volatile Uint32 SGMII_CFGPLL;

       volatile Uint32 SGMII_CFGRX0;

       volatile Uint32 SGMII_CFGTX0;

       volatile Uint32 SGMII_CFGRX1;

       volatile Uint32 SGMII_CFGTX1;

       volatile Uint32 SGMII_RSVD;

       volatile Uint32 PCIE_CFGPLL;

       volatile Uint32 PCIE_SERDES_RSVD;

       volatile Uint32 SRIO_SERDES_CFGPLL;

       volatile Uint32 SRIO_SERDES_CFGRX0;

       volatile Uint32 SRIO_SERDES_CFGTX0;

       volatile Uint32 SRIO_SERDES_CFGRX1;

       volatile Uint32 SRIO_SERDES_CFGTX1;

       volatile Uint32 SRIO_SERDES_CFGRX2;

       volatile Uint32 SRIO_SERDES_CFGTX2;

       volatile Uint32 SRIO_SERDES_CFGRX3;

       volatile Uint32 SRIO_SERDES_CFGTX3;

       volatile Uint32 SRIO_SERDES_RSVD;

       volatile Uint32 LED_GEM_PASSDONE;

       volatile Uint32 LED_PLLLOCK;

       volatile Uint32 LED_CHIP_PASSDONE;

       volatile Uint32 TDIODE;

       volatile Uint32 MARGIN;

       volatile Uint32 SECURE_CONTROL;

       volatile Uint8 RSVD12[4];

       volatile Uint32 EFUSE_SECROM_CHKSUM0;

       volatile Uint32 EFUSE_SECROM_CHKSUM1;

       volatile Uint32 OBSCLK_CTL;

       volatile Uint8 RSVD13[4];

       volatile Uint32 VUSR_CFGPLL;

       volatile Uint32 VUSR_CFGRX0;

       volatile Uint32 VUSR_CFGTX0;

       volatile Uint32 VUSR_CFGRX1;

       volatile Uint32 VUSR_CFGTX1;

       volatile Uint32 VUSR_CFGRX2;

       volatile Uint32 VUSR_CFGTX2;

       volatile Uint32 VUSR_CFGRX3;

       volatile Uint32 VUSR_CFGTX3;

       volatile Uint32 VUSR_SERDES_RSVD;

       volatile Uint32 LED_GPIO_CLR;

       volatile Uint32 LED_GPIO;

       volatile Uint8 RSVD14[12];

       volatile Uint32 EFUSE_RSVD0;

       volatile Uint32 EFUSE_RSVD1;

       volatile Uint32 EFUSE_RSVD2;

       volatile Uint32 EFUSE_RSVD3;

       volatile Uint32 CHIP_MISC;

    #ifdef CSL_MODIFICATION    

       volatile Uint32 DDR3_CONFIG_REG_0;

       volatile Uint32 DDR3_CONFIG_REG_1;

       volatile Uint32 DDR3_CONFIG_REG_2;

       volatile Uint32 DDR3_CONFIG_REG_3;

       volatile Uint32 DDR3_CONFIG_REG_4;

       volatile Uint32 DDR3_CONFIG_REG_5;

       volatile Uint32 DDR3_CONFIG_REG_6;

       volatile Uint32 DDR3_CONFIG_REG_7;

       volatile Uint32 DDR3_CONFIG_REG_8;

       volatile Uint32 DDR3_CONFIG_REG_9;

       volatile Uint32 DDR3_CONFIG_REG_10;

       volatile Uint32 DDR3_CONFIG_REG_11;

       volatile Uint32 DDR3_CONFIG_REG_12;

       volatile Uint32 DDR3_CONFIG_REG_13;

       volatile Uint32 DDR3_CONFIG_REG_14;

       volatile Uint32 DDR3_CONFIG_REG_15;

       volatile Uint32 DDR3_CONFIG_REG_16;

       volatile Uint32 DDR3_CONFIG_REG_17;

       volatile Uint32 DDR3_CONFIG_REG_18;

       volatile Uint32 DDR3_CONFIG_REG_19;

       volatile Uint32 DDR3_CONFIG_REG_20;

       volatile Uint32 DDR3_CONFIG_REG_21;

       volatile Uint32 DDR3_CONFIG_REG_22;

       volatile Uint32 DDR3_CONFIG_REG_23;

       volatile Uint32 DDR3_CONFIG_REG_24;

    #else

       volatile Uint32 DDR3_CONFIG_REG[25];

    #endif

       volatile Uint8 RSVD15[7063];

       volatile Uint32 END_POINT;

    } CSL_BootcfgRegs;

    请问从这些定义的代码能否看出该错误是什么原因呢？谢谢！

  • 0 回复 andy lee1
    TI__Guru 61135 points

    您好，

    你的代码中extern CSL_BootcfgRegs * boot_cfg_regs;是声明，有相应的如下代码定义变量么？

    CSL_BootcfgRegs * boot_cfg_regs;

  • 0 回复 andy lee1
    Expert 1775 points

    楼主，您好！

    extern CSL_BootcfgRegs * boot_cfg_regs

    表示 boot_cfg_regs这个变量 实体定义在外部。

    这样做 是为了避免变量重定义。

    你在 .c 文件中应该再加上

    CSL_BootcfgRegs * boot_cfg_regs

  • 0 回复 Bruce Chen1
    Expert 1240 points

    Bruce Chen

    按你说的问题已经解决！非常感谢！