AM6442: EtherCat从站发送数据丢包严重

你好，下面是我回复您需要我确认的点

1、配置的是在PRU1上运行的，这一部分初始化的代码是我拷贝ethercat_slave_beckhoff_ssc_demo_am64x-evm_r5fss0-0_freertos_ti-arm-clang例程里面的，同一个开发板，电路上用的也是pru1，但是他一开始把pru0也给初始化了，但是后面没用到，我就屏蔽了那一部分，他后面有部分程序是像pru1内存写入数据，但是他例程的源程序是用了TX_PRU0写入，导致的我调用了就程序卡住，后面我发现了改成TX_PRU1，程序正常运行，但是也是依然会断断续续，而且后面的初始化中还会再写入一次数据到pru1内存中，前后两次的数据不一样，用的是PRU1和PRU0两个内存，还有就是我屏蔽了bsp_esc_reg_perm_init，不屏蔽也跑不起来

void tiesc_socEvmInit()
{
    const PRUICSS_HwAttrs *pruicssHwAttrs;
    uint32_t inEventLatch0, inEventLatch1, outEventLatch0, outEventLatch1;
    
    pruIcss1Handle = PRUICSS_open(CONFIG_PRU_ICSS1);
    pruicssHwAttrs = PRUICSS_getAttrs(CONFIG_PRU_ICSS1);

    /* Selecting MII-RT mode in GPCFG mux */
    PRUICSS_setGpMuxSelect(pruIcss1Handle, PRUICSS_PRU1, PRUICSS_GP_MUX_SEL_MODE_MII);

    PRUICSS_setGpiMode(pruIcss1Handle, PRUICSS_PRU1, PRUICSS_GPI_MODE_MII_RT);

    PRUICSS_setIcssCfgMiiMode(pruIcss1Handle, 1, PRUICSS_ICSS_CFG_MII_MODE_MII);

    PRUICSS_setIcssCfgTxFifo(pruIcss1Handle, PRUICSS_TX_L2_FIFO, 0);

    /* Making the clock for ICSSG core and IEP same */
    PRUICSS_setIepClkSrc(pruIcss1Handle, 1U);

    /* Disable PRUs. This is to ensure PRUs are not running when application is not initialized */
    PRUICSS_disableCore(pruIcss1Handle, PRUICSS_PRU1);

    /* TimeSync Router configuration for latch pins */
    if(pruicssHwAttrs->instance == 0)
    {
        inEventLatch0 = CSLR_TIMESYNC_EVENT_INTROUTER0_IN_PINFUNCTION_PRG0_IEP0_EDC_LATCH_IN0IN_PRG0_IEP0_EDC_LATCH_IN0_0;
        inEventLatch1 = CSLR_TIMESYNC_EVENT_INTROUTER0_IN_PINFUNCTION_PRG0_IEP0_EDC_LATCH_IN1IN_PRG0_IEP0_EDC_LATCH_IN1_0;
        outEventLatch0 = TIMESYNC_EVENT_INTROUTER0_MUXCNTL_8;
        outEventLatch1 = TIMESYNC_EVENT_INTROUTER0_MUXCNTL_9;
    }
    else
    {
        inEventLatch0 = CSLR_TIMESYNC_EVENT_INTROUTER0_IN_PINFUNCTION_PRG1_IEP0_EDC_LATCH_IN0IN_PRG1_IEP0_EDC_LATCH_IN0_0;
        inEventLatch1 = CSLR_TIMESYNC_EVENT_INTROUTER0_IN_PINFUNCTION_PRG1_IEP0_EDC_LATCH_IN1IN_PRG1_IEP0_EDC_LATCH_IN1_0;
        outEventLatch0 = TIMESYNC_EVENT_INTROUTER0_MUXCNTL_12;
        outEventLatch1 = TIMESYNC_EVENT_INTROUTER0_MUXCNTL_13;
    }

    HW_WR_REG32((CSL_TIMESYNC_EVENT_INTROUTER0_CFG_BASE + outEventLatch0), (inEventLatch0 | 0x10000));
    HW_WR_REG32((CSL_TIMESYNC_EVENT_INTROUTER0_CFG_BASE + outEventLatch1), (inEventLatch1 | 0x10000));

//    PRUICSS_enableCore(pruIcss1Handle, PRUICSS_PRU1);

    //第二部分的初始化
    int32_t status;
    /* ----------------------------------------------------------------- */
    /* Load the MDIO firmware binary on PRU Core;                        */
    /* ----------------------------------------------------------------- */
    /* Reset Core */
    status = PRUICSS_resetCore(pruIcss1Handle, PRUICSS_PRUx);
    DebugP_assert(SystemP_SUCCESS == status);
    /* Disabe Core */
    status = PRUICSS_disableCore(pruIcss1Handle, PRUICSS_PRUx);
    DebugP_assert(SystemP_SUCCESS == status);

    //PRUICSS_IRAM_TX_PRU(0)---> PRUICSS_IRAM_TX_PRU(1)
    /* Load firmware. Set buffer = write to PRU memory */
    status = PRUICSS_writeMemory(pruIcss1Handle, PRUICSS_IRAM_TX_PRU(1), 0,
                       (uint32_t *) PRUFirmware, sizeof(PRUFirmware));
    DebugP_assert(status != 0);

    /* Pass value to R10 of TX_PRU core for MDIO FW WA Configuration */
    CSL_REG32_WR(CSL_PRU_ICSSG1_DRAM0_SLV_RAM_BASE + CSL_ICSS_G_PR1_PDSP_TX0_IRAM_DEBUG_REGS_BASE + PRU_REG_10, MDIO_MANUAL_MODE_FW_CONFIG_VALUE);
    /* Pass value to R12 of TX_PRU core for emulated MDIO Base Address */
    CSL_REG32_WR(CSL_PRU_ICSSG1_DRAM0_SLV_RAM_BASE + CSL_ICSS_G_PR1_PDSP_TX0_IRAM_DEBUG_REGS_BASE + PRU_REG_12, MDIO_MANUAL_MODE_BASE_ADDRESS);

    /* Run firmware */
    status = PRUICSS_enableCore(pruIcss1Handle, PRUICSS_PRUx);
    DebugP_assert(SystemP_SUCCESS == status);


    //第三部分的初始化
    uint16_t u16PdiCtrl;
    status = SystemP_FAILURE;
    bsp_params bspInitParams;

    /* the memory interface to the ESC, the ESC-interrupt and the ECAT-timer for the
       watchdog monitoring should be initialized here microcontroller specific */

    tiesc_socParamsInit(&bspInitParams);

    //bsp_init里面屏蔽了bsp_esc_reg_perm_init(pruIcssHandle),查了文档这个是默认不开启的,
    status = bsp_init(&bspInitParams);
    DebugP_assert(status == SystemP_SUCCESS);

    /* we have to wait here, until the ESC is started */
    do
    {
        HW_EscReadWord(u16PdiCtrl, ESC_ADDR_PDI_CONTROL);
        u16PdiCtrl = SWAPWORD(u16PdiCtrl) & 0xFF;

    }
    while((u16PdiCtrl != ESC_PDI_INTERFACE_ON_CHIP_BUS)
            && (u16PdiCtrl !=
                ESC_PDI_INTERFACE_SPI_SLAVE));    //Looking for onchip bus or SPI Slave

}

2、发送数据的函数也是一样从那个例程移植过来，我看函数内容很少，下面是函数的实现源码，至于能不能正确发送到Ethercat网络中，因为可以间断的收到数据，我感觉应该问题不大，并且官网也可以查找到对应那个api的说明

/** \brief Data RAM2 (shared) */
#define PRUICSS_SHARED_RAM                          (0x10000U)

#define ASSERT_DMB() __asm__ __volatile__ ("    dmb" "\n\t": : : "memory")

void bsp_write_byte(PRUICSS_Handle pruIcssHandle, uint8_t val, uint16_t address)
{
    uint8_t *pEsc = (uint8_t *)(((PRUICSS_HwAttrs *)(
                                     pruIcssHandle->hwAttrs))->baseAddr + PRUICSS_SHARED_RAM);
    pEsc[address] = val;
    ASSERT_DMB();
}

3、现在还没有找到具体的检测发送结果的API，因为那个例程他只是接收数据，他不发送，所以就是自己先参考文档测试发送，我后面再查下看看怎么实现判断发送结果