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请看下面的解释。 Lock-Step mode is a mode of operation used in safety critical applications. It consists of 2 copies of the Cortex-R5 logic, which are run offset a couple of cycles from each other. The idea is to protect the system from transient errors (for example a soft error caused by an alpha particle strike). The memories are protected by using ECC schemes (usually capable of detecting double bit errors, or correcting single bit errors), so both cores can reference a single memory. The outputs from both cores are compared every cycle, and if at any point they differ, an error can be signaled (this is usually unrecoverable within the system).
